In Document , it says “Select p2972-0000-devkit-pcie-ep board while flashing”. But I can not find board p2972-0000-devkit-pcie-ep. How can i find it? Thanks.
I configure board jetson-xavier pcie controller c5 to ep mode in dtb file and change refclk_sel to high, but the host xavier can not find it using lspci. How can i fix it? thanks.
Seems we didn’t put this file into package. I will help check with internal team first.
Thanks for the report.
I enable pcie C5 endpoint mode, but the host controller can not recongnize it. Problem is same as topic: https://devtalk.nvidia.com/default/topic/1048611/jetson-agx-xavier/use-pcie-to-communicate-between-two-xaviers-ep-reports-quot-uphy-init-failed-for-pcie-ep-22-quot-/
It seems the bpmp for c5 ep doesn’t work properly. Please give me some help, thanks.
Please set BIT:12 of ODM data to enable PCIe EndPoint mode
The file you need to change should be “p2972-0000.conf.common”
I got the following documents about pcie endpoint:
- Jetson AGX Xavier PCIe Endpoint Design Guidelines document.
Now I can recognize the endpoint. Is there document for the usage of tegra-pcie-ep-mem.c? thanks.
We will release a document for endpoint mode soon. Thanks for your patience.
Where can i find tegra-pcie-ep-mem.c driver?
Please download the source code from our download center.