The query of PCIe endpoint setup


I can find the below in ‘NVIDIA Jetson Xavier NX Design Guide’ document. (Jetson_AGX_Xavier_Series_PCIe_Endpoint_Design_Guidelines_DA-09357-001_v1.3.pdf).

Does it mean I have to set CAN0_EN to high for endpoint?
If yes, how to set it?
What is CAN0_EN? I can’t find any information for CAN0_EN.


I didn’t get any response yet.
I am looking forward to getting any information.


No need to worry about it. Our software will handle the status of that pin.
Just need to modify the ODMDATA and flash the board again.

You can refer to Jetson AGX Xavier PCIe Endpoint Software on our download center for detail.
But be careful the document is for AGX Xavier. You have to modify the corresponding files for NX.

Thank you for your feedback.