# The system stops between MB2 and UEFI

**URL:** <https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971>\
**Category:** Jetson AGX Orin\
**Tags:** nvbugs, boot\
**Created:** [April 12, 2022, 11:46am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971 "2022-04-12T11:46:44Z")\
**Posts on this page:** 20\
**Page:** 1

<div class="post-metadata">

**Author:** ![gcs](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/gcs/32/162848_2.png) [@gcs](https://forums.developer.nvidia.com/u/gcs)\
**Post date:** [April 12, 2022, 11:46am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/1 "2022-04-12T11:46:44Z")

</div>

The system stops between MB2 and UEFI on our arrier board with Orin module.What is the cause of this.  
Who can give some advice?

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[0000.067] I\> MB1 (version: 0.11.0.0-t234-54845784-7fb1fa27)  
[0000.073] I\> t234-A01-0-Silicon (0x12347) Prod  
[0000.077] I\> Boot-mode : Coldboot  
[0000.080] I\> Emulation:  
[0000.083] I\> Entry timestamp: 0x00000000  
[0000.086] I\> last\_boot\_error: 0x0  
[0000.089] I\> BR-BCT: preprod\_dev\_sign: 0  
[0000.093] I\> rst\_source: 0x0, rst\_level: 0x0  
[0000.097] I\> Task: Clocks enable (0x50011b9d)  
[0000.102] I\> Task: Crypto init (0x50018df5)  
[0000.106] I\> Task: Secure debug controls (0x5000c76d)  
[0000.111] E\> Error: ECID of check failed!!  
[0000.115] E\> Error: ECID of check failed!!  
[0000.118] E\> Error: ECID of check failed!!  
[0000.122] E\> Error: ECID of check failed!!  
[0000.126] I\> Task: Program NV master stream id (0x5000c725)  
[0000.132] I\> Task: Verify boot mode (0xd482021)  
[0000.140] I\> Task: Alias fuses (0x5000ecd5)  
[0000.145] E\> FUSE\_ALIAS: Fuse alias on production fused part is not supported.  
[0000.152] I\> Task: 0x5000e911  
[0000.154] I\> FUSE\_OPT\_CCPLEX\_CLUSTER\_DISABLE = 0x00000000  
[0000.160] I\> FUSE\_OPT\_GPC\_DISABLE = 0x00000000  
[0000.164] I\> FUSE\_OPT\_DLA\_DISABLE = 0x00000000  
[0000.168] I\> FUSE\_OPT\_EMC\_DISABLE = 0x00000000  
[0000.172] I\> FUSE\_BOOTROM\_PATCH\_VERSION = 0x7  
[0000.177] I\> FUSE\_PSCROM\_PATCH\_VERSION = 0x7  
[0000.181] I\> FUSE\_OPT\_ADC\_CAL\_FUSE\_REV = 0x2  
[0000.185] I\> FUSE\_SKU\_INFO\_0 = 0xd0  
[0000.188] I\> FUSE\_OPT\_SAMPLE\_TYPE\_0 = 0x3 PS  
[0000.192] I\> FUSE\_PACKAGE\_INFO\_0 = 0x2  
[0000.196] I\> SKU: Perfect F0  
[0000.199] I\> Task: Voltage monitor (0x50011ba5)  
[0000.203] I\> VMON: Vmon re-calibration and fine tuning done  
[0000.208] I\> Task: Blockdev init (0x500157e1)  
[0000.213] I\> Task: UPHY init (0x5001b42d)  
[0000.217] E\> UPHY: UPHY lane info table is empty in MB1 BCT.  
[0000.223] I\> Task: Boot device init (0x5000d6a9)  
[0000.227] E\> Adding eMMC storage modules  
[0000.231] I\> Boot-device: QSPI (instance: 0)  
[0000.235] I\> qspi flash params source = mb1bct  
[0000.240] I\> Qspi clock source : pllc\_out0  
[0000.244] I\> QSPI-0l initialized successfully  
[0000.248] I\> Task: TSC init (0x5001c7e1)  
[0000.252] I\> Task: Enable WDT 5th expiry (0x5001d27d)  
[0000.257] I\> Task: Disable WDT globally (0x5001d2b9)  
[0000.262] I\> Task: I2C register (0x50000a09)  
[0000.266] I\> Task: Reset FSI (0x50011ba1)  
[0000.270] I\> Task: Pinmux init (0x50010e95)  
[0000.274] I\> Task: Prod config init (0x50011075)  
[0000.279] I\> Task: Pad voltage init (0x50010f85)  
[0000.283] I\> Task: Prod init (0x50011119)  
[0000.287] I\> Task: Thermal check (0x5001121d)  
[0000.291] I\> max\_chip\_limit = 115  
[0000.294] I\> min\_chip\_limit = -30  
[0000.307] I\> max temp read = 30  
[0000.310] I\> min temp read = 28  
[0000.313] I\> Task: Common rail init (0x50011695)  
[0000.318] W\> Thermal config not found in BCT  
[0000.322] W\> Generic i2c config not found in BCT  
[0000.327] \> DEVICE\_PROD: module = 13, instance = 4 not found in device prod.  
[0000.335] W\> MEMIO rail config not found in BCT  
[0000.340] I\> Task: Mem clock src (0x5000f6b9)  
[0000.344] I\> Task: BR PMIC seq (0x50011711)  
[0000.348] I\> Task: Misc. board config (0x500116ed)  
[0000.353] W\> Platform config not found in BCT  
[0000.357] I\> Task: Load membct (0x5000f5d5)  
[0000.361] I\> RAM\_CODE 0x4000401  
[0000.364] I\> Loading MEM-BCT to SysRAM  
[0000.368] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0000.373] I\> Slot: 0  
[0000.375] I\> Binary[0] block-0 (partition size: 0x40000)  
[0000.380] I\> get\_binary\_info: Binary name: MEM-BCT-0  
[0000.385] I\> Size of crypto header is 8192  
[0000.389] I\> BCH load address is : 0x40050000  
[0000.393] I\> Size of crypto header is 8192  
[0000.397] I\> BCH of MEM-BCT-0 read from storage  
[0000.401] I\> BCH address is : 0x40050000  
[0000.405] I\> MEM-BCT-0 header integrity check is success  
[0000.411] I\> Binary magic in BCH component 0 is MEM0  
[0000.415] I\> component binary type is 0  
[0000.420] I\> MEM-BCT-0 binary is read from storage  
[0000.425] I\> MEM-BCT-0 binary integrity check is success  
[0000.430] I\> Binary MEM-BCT-0 loaded successfully at 0x40040000 (0xe580)  
[0000.440] I\> RAM\_CODE 0x4000401  
[0000.444] I\> Task: Save mem-bct info (0x50011d59)  
[0000.449] I\> Task: SDRAM params override (0x50010c79)  
[0000.453] I\> Task: Carveout allocate (0x50011da5)  
[0000.458] I\> RCM blob carveout will not be allocated  
[0000.463] I\> ECC region[0]: Start:0x0, End:0x0  
[0000.467] I\> ECC region[1]: Start:0x0, End:0x0  
[0000.471] I\> ECC region[2]: Start:0x0, End:0x0  
[0000.476] I\> ECC region[3]: Start:0x0, End:0x0  
[0000.480] I\> ECC region[4]: Start:0x0, End:0x0  
[0000.484] I\> Non-ECC region[0]: Start:0x80000000, End:0x100000000  
[0000.490] I\> Non-ECC region[1]: Start:0x0, End:0x0  
[0000.495] I\> Non-ECC region[2]: Start:0x0, End:0x0  
[0000.499] I\> Non-ECC region[3]: Start:0x0, End:0x0  
[0000.504] I\> Non-ECC region[4]: Start:0x0, End:0x0  
[0000.511] I\> allocated(CO:51) base:0x80000000 size:0x8000000 align: 0x200000  
[0000.518] I\> allocated(CO:44) base:0xd6000000 size:0x2a000000 align: 0x100000  
[0000.525] I\> allocated(CO:31) base:0xce000000 size:0x8000000 align: 0x100000  
[0000.532] I\> allocated(CO:39) base:0xc8000000 size:0x6000000 align: 0x200000  
[0000.538] I\> allocated(CO:20) base:0xc6000000 size:0x2000000 align: 0x2000000  
[0000.545] I\> allocated(CO:24) base:0xc4000000 size:0x2000000 align: 0x2000000  
[0000.552] I\> allocated(CO:28) base:0xc2000000 size:0x2000000 align: 0x2000000  
[0000.560] I\> allocated(CO:29) base:0xc0000000 size:0x2000000 align: 0x2000000  
[0000.567] I\> allocated(CO:41) base:0xbf000000 size:0x1000000 align: 0x100000  
[0000.573] I\> allocated(CO:43) base:0xbe000000 size:0x1000000 align: 0x200000  
[0000.580] I\> allocated(CO:02) base:0xbd800000 size:0x800000 align: 0x800000  
[0000.587] I\> allocated(CO:03) base:0xbd000000 size:0x800000 align: 0x800000  
[0000.594] I\> allocated(CO:06) base:0xbc800000 size:0x800000 align: 0x800000  
[0000.601] I\> allocated(CO:10) base:0xbc000000 size:0x800000 align: 0x800000  
[0000.608] I\> allocated(CO:56) base:0xbb800000 size:0x800000 align: 0x200000  
[0000.615] I\> allocated(CO:07) base:0xbb400000 size:0x400000 align: 0x400000  
[0000.621] I\> allocated(CO:22) base:0xbb000000 size:0x400000 align: 0x400000  
[0000.628] I\> allocated(CO:33) base:0xbac00000 size:0x400000 align: 0x200000  
[0000.635] I\> allocated(CO:47) base:0xba800000 size:0x400000 align: 0x200000  
[0000.642] I\> allocated(CO:01) base:0xba700000 size:0x100000 align: 0x100000  
[0000.649] I\> allocated(CO:04) base:0xba600000 size:0x100000 align: 0x100000  
[0000.655] I\> allocated(CO:05) base:0xba500000 size:0x100000 align: 0x100000  
[0000.662] I\> allocated(CO:08) base:0xba400000 size:0x100000 align: 0x100000  
[0000.669] I\> allocated(CO:09) base:0xba300000 size:0x100000 align: 0x100000  
[0000.676] I\> allocated(CO:15) base:0xba200000 size:0x100000 align: 0x100000  
[0000.683] I\> allocated(CO:17) base:0xba100000 size:0x100000 align: 0x100000  
[0000.690] I\> allocated(CO:23) base:0xba000000 size:0x100000 align: 0x100000  
[0000.696] I\> allocated(CO:27) base:0xb9f00000 size:0x100000 align: 0x100000  
[0000.703] I\> allocated(CO:42) base:0xb9e00000 size:0x100000 align: 0x100000  
[0000.710] I\> allocated(CO:54) base:0xb9d80000 size:0x80000 align: 0x80000  
[0000.717] I\> allocated(CO:26) base:0xb9d40000 size:0x40000 align: 0x2000  
[0000.723] I\> allocated(CO:48) base:0xb9d20000 size:0x20000 align: 0x10000  
[0000.730] I\> allocated(CO:34) base:0xb9d10000 size:0x10000 align: 0x10000  
[0000.737] I\> allocated(CO:35) base:0xb9d00000 size:0x10000 align: 0x10000  
[0000.743] I\> allocated(CO:49) base:0xb9cf0000 size:0x10000 align: 0x10000  
[0000.750] I\> allocated(CO:50) base:0xb9ce0000 size:0x10000 align: 0x10000  
[0000.757] I\> allocated(CO:52) base:0xb9cd0000 size:0x10000 align: 0x10000  
[0000.763] I\> Task: SDRAM init (0x5000f6bd)  
[0000.770] I\> SDRAM-params @ 0xd485000  
[0000.773] I\> MSS code-drop: NvBootSdramInit  
[0000.777] I\> MSS CAR: PLLM/HUB programming for MemoryType: 4 and MemBctRevision: 8  
[0000.785] I\> MSS CAR: Init PLLM  
[0000.788] I\> MSS CAR: Init PLLHUB  
[0000.798] I\> mb1\_sdram\_init Done !  
[0000.801] I\> SDRAM Size in Total 800000000  
[0000.805] I\> SDRAM test pass  
[0000.808] I\> Task: Dram ecc scrub (0x5000f2c9)  
[0000.812] I\> Task: DRAM alias check (0x50010c71)  
[0001.029] I\> Task: Register checker (0x50010c75)  
[0001.038] I\> Task: Enable clock-mon (0x5001c301)  
[0001.054] I\> FMON: Fmon re-programmed in mb1  
[0001.059] I\> Task: Mapper init (0x5001a0d5)  
[0001.064] I\> Task: SC7 Context Init (0x5001cacd)  
[0001.070] I\> NV\_SC7 Context addr: 0xa0000000  
[0001.076] I\> Task: CCPLEX IST init (0x5000ce75)  
[0001.081] I\> Task: CPU WP0 (0x5000c2c9)  
[0001.087] I\> Loading MCE  
[0001.089] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0001.095] I\> Slot: 0  
[0001.098] I\> Binary[8] block-0 (partition size: 0x80000)  
[0001.104] I\> get\_binary\_info: Binary name: MCE  
[0001.109] I\> Size of crypto header is 8192  
[0001.113] I\> BCH load address is : 0x4003e000  
[0001.118] I\> Size of crypto header is 8192  
[0001.123] I\> BCH of MCE read from storage  
[0001.128] I\> BCH address is : 0x4003e000  
[0001.133] I\> MCE header integrity check is success  
[0001.138] I\> Binary magic in BCH component 0 is MTSM  
[0001.144] I\> component binary type is 8  
[0001.148] I\> Size of crypto header is 8192  
[0001.154] I\> MCE binary is read from storage  
[0001.160] I\> MCE binary integrity check is success  
[0001.165] I\> Binary MCE loaded successfully at 0x40000000 (0x29e90)  
[0001.172] I\> Size of crypto header is 8192  
[0001.184] I\> Size of crypto header is 8192  
[0001.189] I\> Sending WP0 mailbox command to PSC  
[0001.201] I\> Task: MB1 fixed firewalls (0x5001b1bd)  
[0001.213] I\> Task: Load bpmp-fw (0x5001b311)  
[0001.218] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0001.224] I\> Slot: 0  
[0001.227] I\> Binary[15] block-0 (partition size: 0x100000)  
[0001.233] I\> get\_binary\_info: Binary name: BPMP\_FW  
[0001.238] I\> Size of crypto header is 8192  
[0001.243] I\> BCH load address is : 0x807fe000  
[0001.248] I\> Size of crypto header is 8192  
[0001.253] I\> BCH of BPMP\_FW read from storage  
[0001.258] I\> BCH address is : 0x807fe000  
[0001.263] I\> BPMP\_FW header integrity check is success  
[0001.269] I\> Binary magic in BCH component 0 is BPMF  
[0001.274] I\> component binary type is 15  
[0001.278] I\> Size of crypto header is 8192  
[0001.293] I\> BPMP\_FW binary is read from storage  
[0001.300] I\> BPMP\_FW binary integrity check is success  
[0001.306] I\> Binary BPMP\_FW loaded successfully at 0x80000000 (0xf3940)  
[0001.314] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0001.320] I\> Slot: 0  
[0001.322] I\> Binary[16] block-0 (partition size: 0x100000)  
[0001.328] I\> get\_binary\_info: Binary name: BPMP\_FW\_DTB  
[0001.334] I\> Size of crypto header is 8192  
[0001.339] I\> BCH load address is : 0x807fc000  
[0001.344] I\> Size of crypto header is 8192  
[0001.349] I\> BCH of BPMP\_FW\_DTB read from storage  
[0001.354] I\> BCH address is : 0x807fc000  
[0001.360] I\> BPMP\_FW\_DTB header integrity check is success  
[0001.365] I\> Binary magic in BCH component 0 is BPMD  
[0001.371] I\> component binary type is 16  
[0001.375] I\> Size of crypto header is 8192  
[0001.381] I\> BPMP\_FW\_DTB binary is read from storage  
[0001.387] I\> BPMP\_FW\_DTB binary integrity check is success  
[0001.393] I\> Binary BPMP\_FW\_DTB loaded successfully at 0x807dbc00 (0x20240)  
[0001.402] I\> Program IPC carveouts  
[0001.407] I\> Task: Load psc-fw (0x5001b3b9)  
[0001.413] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0001.419] I\> Slot: 0  
[0001.421] I\> Binary[17] block-0 (partition size: 0x80000)  
[0001.427] I\> get\_binary\_info: Binary name: PSC\_FW  
[0001.432] I\> Size of crypto header is 8192  
[0001.437] I\> BCH load address is : 0x803fe000  
[0001.442] I\> Size of crypto header is 8192  
[0001.447] I\> BCH of PSC\_FW read from storage  
[0001.452] I\> BCH address is : 0x803fe000  
[0001.457] I\> PSC\_FW header integrity check is success  
[0001.463] I\> Binary magic in BCH component 0 is PFWP  
[0001.468] I\> component binary type is 17  
[0001.472] I\> Size of crypto header is 8192  
[0001.481] I\> PSC\_FW binary is read from storage  
[0001.487] I\> PSC\_FW binary integrity check is success  
[0001.492] I\> Binary PSC\_FW loaded successfully at 0x80000000 (0x57800)  
[0001.500] I\> Task: Load nvdec-fw (0x5001c05d)  
[0001.506] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0001.512] I\> Slot: 0  
[0001.514] I\> Binary[7] block-0 (partition size: 0x100000)  
[0001.520] I\> get\_binary\_info: Binary name: NVDEC  
[0001.525] I\> Size of crypto header is 8192  
[0001.530] I\> BCH load address is : 0x800fe000  
[0001.535] I\> Size of crypto header is 8192  
[0001.540] I\> BCH of NVDEC read from storage  
[0001.545] I\> BCH address is : 0x800fe000  
[0001.550] I\> NVDEC header integrity check is success  
[0001.556] I\> Binary magic in BCH component 0 is NDEC  
[0001.561] I\> component binary type is 7  
[0001.565] I\> Size of crypto header is 8192  
[0001.572] I\> NVDEC binary is read from storage  
[0001.578] I\> NVDEC binary integrity check is success  
[0001.583] I\> Binary NVDEC loaded successfully at 0x80000000 (0x35000)  
[0001.595] I\> Task: Load tsec-fw (0x5001c249)  
[0001.600] I\> TSEC-FW load support not enabled  
[0001.605] I\> Task: TZDRAM setup (0x50012515)  
[0001.611] I\> Task: SC7 context save (0x5001cbd1)  
[0001.616] I\> NV\_SC7 Context addr: 0xa0000000  
[0001.622] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0001.628] I\> Slot: 0  
[0001.631] I\> Binary[13] block-0 (partition size: 0x20000)  
[0001.637] I\> get\_binary\_info: Binary name: SC7-FW  
[0001.642] I\> Size of crypto header is 8192  
[0001.646] I\> Size of crypto header is 8192  
[0001.651] I\> BCH load address is : 0xa0002000  
[0001.656] I\> Size of crypto header is 8192  
[0001.661] I\> BCH of SC7-FW read from storage  
[0001.666] I\> BCH address is : 0xa0002000  
[0001.671] I\> SC7-FW header integrity check is success  
[0001.677] I\> Binary magic in BCH component 0 is WB0B  
[0001.682] I\> component binary type is 13  
[0001.686] I\> Size of crypto header is 8192  
[0001.692] I\> SC7-FW binary is read from storage  
[0001.697] I\> SC7-FW binary integrity check is success  
[0001.702] I\> Binary SC7-FW loaded successfully at 0xa0004000 (0xa4e0)  
[0001.710] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0001.716] I\> Slot: 0  
[0001.719] I\> Binary[22] block-0 (partition size: 0x30000)  
[0001.725] I\> get\_binary\_info: Binary name: PSC\_RF  
[0001.730] I\> Size of crypto header is 8192  
[0001.734] I\> Size of crypto header is 8192  
[0001.739] I\> BCH load address is : 0xa000e4e0  
[0001.744] I\> Size of crypto header is 8192  
[0001.749] I\> BCH of PSC\_RF read from storage  
[0001.754] I\> BCH address is : 0xa000e4e0  
[0001.760] I\> PSC\_RF header integrity check is success  
[0001.765] I\> Binary magic in BCH component 0 is PSCR  
[0001.770] I\> component binary type is 22  
[0001.774] I\> Size of crypto header is 8192  
[0001.780] I\> PSC\_RF binary is read from storage  
[0001.786] I\> PSC\_RF binary integrity check is success  
[0001.791] I\> Binary PSC\_RF loaded successfully at 0xa00104e0 (0x1af70)  
[0001.810] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0001.816] I\> Slot: 0  
[0001.819] I\> Binary[14] block-0 (partition size: 0x20000)  
[0001.825] I\> get\_binary\_info: Binary name: MB2\_RF  
[0001.830] I\> Size of crypto header is 8192  
[0001.834] I\> Size of crypto header is 8192  
[0001.839] I\> BCH load address is : 0xa008c020  
[0001.844] I\> Size of crypto header is 8192  
[0001.849] I\> BCH of MB2\_RF read from storage  
[0001.854] I\> BCH address is : 0xa008c020  
[0001.859] I\> MB2\_RF header integrity check is success  
[0001.865] I\> Binary magic in BCH component 0 is MB2R  
[0001.870] I\> component binary type is 14  
[0001.874] I\> Size of crypto header is 8192  
[0001.880] I\> MB2\_RF binary is read from storage  
[0001.885] I\> MB2\_RF binary integrity check is success  
[0001.891] I\> Binary MB2\_RF loaded successfully at 0xa008e020 (0xd360)  
[0001.899] E\> FUSE\_ALIAS: Fuse alias on production fused part is not supported.  
[0001.906] I\> SC7 context fuse-bypass data is empty  
[0001.912] I\> SC7 context save done  
[0001.915] I\> Task: Load MB2/Applet/FSKP (0x5001c305)  
[0001.922] I\> Loading MB2  
[0001.924] I\> Scratch RSV109: 0x00000001 active chain: 0  
[0001.930] I\> Slot: 0  
[0001.933] I\> Binary[6] block-0 (partition size: 0x70000)  
[0001.939] I\> get\_binary\_info: Binary name: MB2  
[0001.943] I\> Size of crypto header is 8192  
[0001.948] I\> BCH load address is : 0x8007e000  
[0001.954] I\> Size of crypto header is 8192  
[0001.958] I\> BCH of MB2 read from storage  
[0001.963] I\> BCH address is : 0x8007e000  
[0001.968] I\> MB2 header integrity check is success  
[0001.973] I\> Binary magic in BCH component 0 is MB2B  
[0001.979] I\> component binary type is 6  
[0001.983] I\> Size of crypto header is 8192  
[0001.992] I\> MB2 binary is read from storage  
[0001.998] I\> MB2 binary integrity check is success  
[0002.003] I\> Binary MB2 loaded successfully at 0x80000000 (0x69940)  
[0002.011] I\> Task: Prepare MB2 params (0x5001c3d5)  
[0002.018] I\> MB2-params @ 0x40060000  
[0002.025] I\> BR-BCT Boot Chain Fields  
[0002.029] I\> u32\_non\_gpio\_select\_boot\_chain : 0  
[0002.034] I\> u32\_num\_boot\_chains : 2  
[0002.040] I\> bf\_bl\_gpio\_select\_boot\_chain\_1b : 0  
[0002.045] I\> Task: Dram ecc test (0x5000f379)  
[0002.050] I\> Task: Misc NV security settings (0x5000ca35)  
[0002.057] I\> NVDEC sticky bits programming done  
[0002.062] I\> Task: GPIO interrupt map (0x50011a61)  
[0002.068] I\> Task: Disable/Reload WDT (0x5001d2e9)  
[0002.074] I\> Programmed SLCG global override := 0x0  
[0002.079] I\> MB1: MSS reconfig completed  
I\> MB2 (version: 0.0.0.0-t234-54845784-7ddc80a9)  
I\> t234-A01-0-Silicon (0x12347)  
I\> Boot-mode : Coldboot  
I\> Emulation:  
I\> Entry timestamp: 0x0020629a  
I\> Regular heap: [base:0x40040000, size:0x10000]  
I\> DMA heap: [base:0xbb800000, size:0x800000]  
I\> Task: Enable hot-plug capability (0x500185c0)  
I\> Task: Set blob address (0x50001c70)  
I\> Task: PSC mailbox init (0x5000c4d8)  
I\> Task: Crypto init (0x500039b4)  
I\> Task: I2C register (0x50001c5c)  
I\> Task: Boot device init (0x50001d2c)  
I\> Boot\_device: QSPI\_FLASH instance: 0  
I\> Qspi clock source : pllc\_out0  
I\> QSPI-0l initialized successfully  
I\> qspi flash-0 params source = MB2 params  
I\> sdmmc-3 params source = MB2 params  
I\> Task: Partition Manager Init (0x50001cf8)  
I\> Found 57 partitions in QSPI\_FLASH (instance 0)  
W\> Cannot find any partition table for 00000003

> PARTITION\_MANAGER: Failed to publish partition.  
> I\> Found 11 partitions in SDMMC\_USER (instance 3)  
> I\> Task: Load and authenticate registered FWs (0x5000ff0c)  
> I\> Task: Load AUXP FWs (0x50018164)  
> I\> Successfully register SPE FW load task with MB2 loader  
> I\> Skipping SCE FW load  
> I\> Successfully register RCE FW load task with MB2 loader  
> I\> Successfully register DCE FW load task with MB2 loader  
> I\> Unpowergating APE  
> I\> Unpowergate done  
> I\> Successfully register APE FW load task with MB2 loader  
> I\> Skipping FSI FW load  
> I\> Successfully register XUSB FW load task with MB2 loader  
> I\> Scratch RSV109: 0x00000001 active chain: 0  
> I\> Partition name: A\_spe-fw  
> I\> Size of partition: 589824  
> I\> Binary@ device:3/0 block-56320 (partition size: 0x90000), name: A\_spe-fw  
> E\> Binary spe is not found in comp table  
> I\> Scratch RSV109: 0x00000001 active chain: 0  
> I\> Partition name: A\_rce-fw  
> I\> Size of partition: 1048576  
> I\> Binary@ device:3/0 block-57472 (partition size: 0x100000), name: A\_rce-fw  
> E\> Binary rce is not found in comp table  
> I\> spe: Authentication Finalize Done  
> I\> Binary spe loaded successfully at 0xba400000  
> I\> Scratch RSV109: 0x00000001 active chain: 0  
> I\> Partition name: A\_dce-fw  
> I\> Size of partition: 9437184  
> I\> Binary@ device:3/0 block-37888 (partition size: 0x900000), name: A\_dce-fw  
> E\> Binary dce is not found in comp table  
> I\> rce: Authentication Finalize Done  
> I\> Binary rce loaded successfully at 0xba100000  
> I\> Scratch RSV109: 0x00000001 active chain: 0  
> I\> Partition name: A\_adsp-fw  
> I\> Size of partition: 2097152  
> I\> Binary@ device:3/0 block-59520 (partition size: 0x200000), name: A\_adsp-fw  
> E\> Binary ape is not found in comp table  
> I\> dce: Authentication Finalize Done  
> I\> Binary dce loaded successfully at 0xc6000000  
> I\> Scratch RSV109: 0x00000001 active chain: 0  
> I\> Partition name: A\_xusb-fw  
> I\> Size of partition: 262144  
> I\> Binary@ device:3/0 block-10368 (partition size: 0x40000), name: A\_xusb-fw  
> E\> Binary xusb is not found in comp table  
> I\> ape: Authentication Finalize Done  
> I\> Binary ape loaded successfully at 0xbb400000  
> I\> xusb: Authentication Finalize Done  
> I\> Binary xusb loaded successfully at 0xba500000  
> I\> Task: Carveout setup (0x5001170c)  
> I\> Program remaining OEM carveouts  
> I\> Task: Restore XUSB sec (0x50001c30)  
> I\> Task: OEM firewalls (0x500155c8)  
> I\> MB2-BCT Firewall data is empty  
> I\> Task: Unhalt AUXPs (0x500183cc)  
> I\> Unhalting SPE…  
> I\> Enabling combined UART  
> ▒▒▒▒spe: early\_init  
> vic initialized  
> tsc initialized  
> aon lic initialized  
> spe: tag is 9f1f07bc2d4b6509c13554672acefaad  
> spe: SafeRTOS v8.4  
> spe: init  
> scheduler initialized  
> aon hsp initialized  
> tag initialized  
> tcu initialized  
> bpmp ipc initialized  
> spe: late init  
> cpu\_nic clock initialized  
> apb clock initialized  
> pm initialized  
> bpmp hsp initialized  
> top1 hsp initialized  
> ccplex ipc initialized  
> spe: start scheduler  
> ▒▒  
> I\> Task: Trigger mailbox for PSC-BL1 exit (0x5000c558)  
> I\> Sending opcode 0x4d420802 to psc  
> ▒▒INFO: Entering psc\_monitor\_init!  
> INFO: GSC22 BOM:0xbb000000 SIZE:0x400000 CLIENT\_ACCESS1:00180000  
> INFO: PSCFW BUILD VERSION: a796142-39d6527-7490c54-dev  
> INF▒▒I\> Received ACK from psc▒▒O: mstatus:0xa00000808  
> INFO: Supervisor entry\_point:c108c00  
> INFO: pllpsc is already locked.  
> INFO: MONITOR: user task▒▒  
> ▒▒  
> I\> Task: Start secure NOR provision (0x5000e298)  
> I\> Task: Load FSI keyblob (0x5000c920)  
> I\> Skipping FSI key blob copy  
> I\> Task: ▒▒ addr:0xbb022000, blo▒▒Enable FSITHERM (0x5000c4ac)  
> ▒▒b offset:0x00020000  
> ▒▒I\> Task: Unhalt AUXPs (0x500183d4)  
> I\> SCE unhalt skipped  
> I\> Unhalting RCE  
> I\> RCE unhalt successful  
> I\> DCE unhalt successful  
> I\> APE unhalt skipped  
> I\> FSI unhalt skipped  
> I\> Task: Load CPUBL (0x5000d6d0)  
> I\> Task: Load TOS (0x5000dc04)  
> I\> Task: Load and authenticate registered FWs (0x5000ff0c)  
> I\> Scratch RSV109: 0x00000001 active ch▒▒[2.433879] Camera-FW on t234-rce-safe started  
> ▒▒ain: 0  
> I\> Partition name: A\_cpu-bootloader  
> I\> Size of partition: 3670016  
> I\> Binary@ device:3/0 block-17920 (partition size: 0x380000), name: A\_cpu-bootloader  
> ▒▒bpmp: init  
> bpmp: base binary md5 is f0425a554b39d571b1bbb5291283d946  
> bpmp: ▒▒E\> Binary cpubl is no▒▒INFO: MONITOR: populated user images:16  
> INFO: mret to Supervisor!  
> INFO: psc supervisor init.  
> INFO: psc\_irq\_init…  
> INFO: enter idle task.  
> ▒▒combined binary md5 is 43f75b5aad2b8e1992e4e049bafc8696  
> bpmp: firmware tag is 43f75b5aad2b8e▒▒t found in comp table  
> ▒▒TCU early console enabled.  
> ▒▒  
> ▒▒1992e4-f0425a554b3  
> initialized vwdt  
> initialized clk\_mach\_early  
> initialized mail\_early  
> initialized fuse  
> initialized vfrel  
> initialized hwwdt  
> initialized adc  
> fmon\_populate\_monitors: found 199 monitors  
> initialized fmon  
> initialized mc  
> initialized reset  
> initialized uphy\_early  
> initialized emc\_early  
> 469 clocks registered  
> initialized clk\_mach  
> initialized clk\_cal\_early  
> initialized clk\_ma▒▒I\> Scratch RSV109: 0x▒▒ch\_early\_config  
> initialized io\_dpd  
> initialized therma▒▒00000001 active ch▒▒l  
> initialized soctherm  
> initialized regime  
> initialized i2c  
> vrmon\_dt\_init: vrmon node not found  
> vrmon\_chk\_boot\_state:initialized vrmon  
> initialized regulator  
> initialized avfs\_clk\_platform  
> initialized powergate  
> initialized dvs  
> initialized clk\_mach\_config  
> initialized pm  
> initialized suspend  
> initialized strap  
> initialized emc  
> initialized emc\_mrq  
> WARNING @ [platform/drivers/clk/clk-fwk/clk-cal.c]: aon\_apb is not configured by BPMP-FW  
> WARNING @▒▒ain: 0  
> I\> Partition name: A\_secure-os  
> I\> Size of partition: 4194304  
> I\> Binary@ device:3/0 block-25088 (partition size: 0x400000), name: A\_secure-os  
> ▒▒E\> Binary tos is not ▒▒clk-fwk/clk-cal.c]: aon\_cpu\_nic is not configured by BPMP-FW  
> initialized clk\_cal  
> initialized uphy\_dt  
> initialized ▒▒found in comp table  
> ▒▒uphy\_mrq  
> start PLL 8 calibration timeout

FATAL ERROR [FILE=platform/drivers/uphy/uphy-tegra234.c, ERR\_UID=2251]: start PLL 8 calibr▒▒I\> MB2-params @ 0x40060000  
I\> CPUBL-params @ 0xc2000000  
▒▒ation failed  
r0\_usr 0x500886bc  
r1\_usr 0x000008cb  
r2\_usr 0x50038988  
r3\_usr 0x50181ec8  
r4\_usr 0x5000231c  
r5\_usr 0x50038988  
r6\_usr 0x000008cb  
r7\_usr 0x500886bc  
r8\_usr 0x50181ec8 r8\_fiq 0x00000000  
r9\_usr 0x501f2e70 r9\_fiq 0x00000000  
r10\_usr 0x00000000 r10\_fiq 0x00000000  
r11\_usr 0x501c44e4 r11\_fiq 0x00000000  
r12\_usr 0xc0000000 r12\_fiq 0x00000000  
sp\_usr 0x50181ea0 sp\_fiq 0x5001a620 sp\_irq 0xsp\_svc 0x5001a400 sp\_abt 0x5001ac00 sp\_und 0x5001ab70  
lr\_usr 0x500031d1 lr\_fiq 0x00000000 lr\_irq 0x5005c168  
lr\_svc 0x5000a3d8 lr\_abt 0x00000000 lr\_und 0x50002320  
pc 0x5000231c  
spsr 0x20000010  
fpscr 0x20000010  
Bootstrap@0x501d85a0 sp 0x50181ea0 stack: 501800cc - 50181ffc  
call stack:  
sp 0x50181ea0 pc 0x5000231c  
sp 0x50181ea0 pc 0x500031d0  
sp 0x50181eb8 pc 0x5003897c  
sp 0x50181f08 pc 0x50039878  
sp 0x5018▒▒E\> I2C: slave not found in slaves.  
▒▒1f68 pc 0x50030532  
sp 0x50181fb0 pc 0x5002eb50  
sp 0x50181ff0 pc 0x5006810e  
sp 0x50181ff8 pc 0xaaaaaaaa  
eht\_idx\_find: 0xaaaaaaaa not a valid code address  
no eidx for 0xaaaaaaaa  
▒▒E\> I2C: Could not write 0 bytes to slave: 0x00ac with repeat start true.  
E\> I2C\_DEV: Failed to send register address 0x00000000.  
E\> I2C\_DEV: Could not read 256 registers of size 1 from slave 0xac at 0x00000000 via instance 0.  
E\> eeprom: Failed to read I2C slave device  
E\> cpubl: Parallel task execution failed  
C\> Task 0x0 failed (err: 0x1f1e050d)  
E\> Top caller module: I2C\_DEV, error module: I2C, reason: 0x0d, aux\_info: 0x05  
I\> Busy Spin  
▒▒ERROR: camera-ip/isp5/isp5.c:1985 [isp5\_pm\_init] “ERROR: Failed to turn isp power on”  
BUG: core/init/init.c:85 [init\_all] “\*\*\* FIRMWARE INIT FAILED AT LEVEL 95 \*\*\*”

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [April 13, 2022, 3:20am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/3 "2022-04-13T03:20:16Z")

</div>

Hi,

Sorry that could you attach your log as text file in case the whole format goes wrong on forum?

---

<div class="post-metadata">

**Author:** ![gcs](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/gcs/32/162848_2.png) [@gcs](https://forums.developer.nvidia.com/u/gcs)\
**Post date:** [April 13, 2022, 3:29am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/4 "2022-04-13T03:29:08Z")

</div>

[orin-up.log](https://forums.developer.nvidia.com/uploads/short-url/3tZcyEH3PZnxb5q0wARftfb4Fn9.log) (25.7 KB)

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [April 13, 2022, 3:30am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/5 "2022-04-13T03:30:20Z")

</div>

Have you tried to flash with devkit? Is there a problem if using devkit?

---

<div class="post-metadata">

**Author:** ![gcs](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/gcs/32/162848_2.png) [@gcs](https://forums.developer.nvidia.com/u/gcs)\
**Post date:** [April 13, 2022, 4:54am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/6 "2022-04-13T04:54:56Z")

</div>

Is the same using devkit conf to flash.

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [April 13, 2022, 5:10am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/7 "2022-04-13T05:10:06Z")

</div>

我的意思是你有試過用AGX Orin devkit燒機過嗎

用Orin devkit燒的話會有這個問題嗎？ 還是這只發生在你的carrier board上？

I mean have you ever used AGX Orin devkit to flash? Is it okay with devkit? And this issue is only happened to your custom board?

---

<div class="post-metadata">

**Author:** ![gcs](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/gcs/32/162848_2.png) [@gcs](https://forums.developer.nvidia.com/u/gcs)\
**Post date:** [April 13, 2022, 6:11am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/8 "2022-04-13T06:11:39Z")

</div>

AGX Orin devkit run is OK.  
It only appears on our carrier board.

---

<div class="post-metadata">

**Author:** ![Trumany](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/trumany/32/14043_2.png) [@Trumany](https://forums.developer.nvidia.com/u/Trumany)\
**Post date:** [April 13, 2022, 7:30am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/10 "2022-04-13T07:30:06Z")

</div>

Hi, there are 3 errors in our log comparing to devkit:

1. When bpmp initialized uphy, there is “start PLL 8 calibration timeout”.
2. I2C error
3. camera isp issue.

You can investigate from above points. And since it only happened on your custom board, it looks more like a custom HW issue. You can check it based on Design Guide and compare your design to reference (P3737) in [DLC](https://developer.nvidia.com/embedded/downloads).

---

<div class="post-metadata">

**Author:** ![Haiping.Yang](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/haiping.yang/32/161872_2.png) [@Haiping.Yang](https://forums.developer.nvidia.com/u/Haiping.Yang)\
**Post date:** [April 19, 2022, 4:08am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/12 "2022-04-19T04:08:44Z")

</div>

Hi, GCS,

I’ve encountered the same issue while the Orin module worked with our customized carrier board, but the carrier board can work well with the Xavier module, the root cause it seems like attribute to the incompatibility of UPHY(PLL) module between Orin and Xavier.  
Did you have fixed it, or any new finding?  
Thank you!

Thanks,  
Haiping

---

<div class="post-metadata">

**Author:** ![guwen](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@guwen](https://forums.developer.nvidia.com/u/guwen)\
**Post date:** [April 19, 2022, 12:30pm UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/14 "2022-04-19T12:30:28Z")

</div>

> [@Trumany](#):
>
> art PLL 8 calibration timeout”.

I’m having the same problem. I’m uploading my problem log，Please check to see if it’s the same problem？  
[orin\_boot\_failed.log](https://forums.developer.nvidia.com/uploads/short-url/1FNGEBuk4JoTJnIVeauHUMbXAIb.log) (24.8 KB)

---

<div class="post-metadata">

**Author:** ![guwen](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@guwen](https://forums.developer.nvidia.com/u/guwen)\
**Post date:** [April 19, 2022, 12:32pm UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/15 "2022-04-19T12:32:09Z")

</div>

I have a guess, is there an EEPROM chip on board, MB2 phase will read the corresponding verification information from the EEPROM on board, so as to start normally?

---

<div class="post-metadata">

**Author:** ![sundaoyu](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@sundaoyu](https://forums.developer.nvidia.com/u/sundaoyu)\
**Post date:** [April 20, 2022, 3:46am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/16 "2022-04-20T03:46:54Z")

</div>

i’ve encountered the same issue with my customized carrier board. Is there any way to change UPHY configuration to #2, i guess maybe it is the key problem.

---

<div class="post-metadata">

**Author:** ![gcs](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/gcs/32/162848_2.png) [@gcs](https://forums.developer.nvidia.com/u/gcs)\
**Post date:** [April 20, 2022, 2:22pm UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/17 "2022-04-20T14:22:07Z")

</div>

Wating the BSP’s updating from NV.

---

<div class="post-metadata">

**Author:** ![gcs](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/gcs/32/162848_2.png) [@gcs](https://forums.developer.nvidia.com/u/gcs)\
**Post date:** [April 20, 2022, 2:24pm UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/18 "2022-04-20T14:24:12Z")

</div>

Change the ODMDATA value for different configur.

---

<div class="post-metadata">

**Author:** ![liu.jialu](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/liu.jialu/32/146402_2.png) [@liu.jialu](https://forums.developer.nvidia.com/u/liu.jialu)\
**Post date:** [April 21, 2022, 1:56am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/19 "2022-04-21T01:56:46Z")

</div>

i’ve encountered the same issue with my customized carrier board. Maybe need a EEPROM?

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [April 21, 2022, 2:30am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/20 "2022-04-21T02:30:43Z")

</div>

We will answer your question later. Still doing internal check.

There is no need for adding a custom board eeprom. If any log is asking you to add it, then it is our bug. We will fix.

---

<div class="post-metadata">

**Author:** ![guwen](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@guwen](https://forums.developer.nvidia.com/u/guwen)\
**Post date:** [April 21, 2022, 2:55am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/21 "2022-04-21T02:55:08Z")

</div>

[orin\_boot\_failed.log](https://forums.developer.nvidia.com/uploads/short-url/1FNGEBuk4JoTJnIVeauHUMbXAIb.log) (24.8 KB)

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [April 21, 2022, 7:06am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/22 "2022-04-21T07:06:26Z")

</div>

Hi @guwen ,

For your case which only has I2C error, please try to set cvb read size to 0 in ./tegra234-mb2-bct-common.dtsi

> cvb\_eeprom\_read\_size = \<0x100\>;

---

<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [April 21, 2022, 7:10am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/23 "2022-04-21T07:10:50Z")

</div>

@gcs please also try this. This may resolve the first i2c error in your log.

---

<div class="post-metadata">

**Author:** ![gcs](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/gcs/32/162848_2.png) [@gcs](https://forums.developer.nvidia.com/u/gcs)\
**Post date:** [April 21, 2022, 8:43am UTC](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971/24 "2022-04-21T08:43:26Z")

</div>

Yes, I2C error disappeared.

[Next page](https://forums.developer.nvidia.com/t/the-system-stops-between-mb2-and-uefi/210971.md?page=2)
