Hi NVIDIA Team,
I am encountering an issue when attempting to receive files over UART5 (/dev/ttyAMA5) using the ZMODEM protocol (rz) on the Jetson AGX Thor platform with customer board.
While basic character transmission works without any issues, the failure specifically occurs when Thor acts as the receiver using rz. fails with repeated CRC errors and timeouts.
Test Steps & Commands
- Target Side (Thor): Set UART parameters to Raw mode and start
rz:
stty -F /dev/ttyAMA5 115200 cs8 -cstopb -parenb raw -echo
rz -E -b < /dev/ttyAMA5 > /dev/ttyAMA5
- Host PC Side: Set
/dev/ttyUSB0to Raw mode and send file viasz:
sudo stty -F /dev/ttyUSB0 115200 cs8 -cstopb -parenb raw -echo
sz -E -b jetson-agx-thor-devkit_decompiled.dts < /dev/ttyUSB0 > /dev/ttyUSB0
Error Log
During transmission, rz continuously throws CRC errors, timeouts, and fails to receive the data properly:
root@tegra-ubuntu:/home/nvidia# rz -E -b < /dev/ttyAMA5 > /dev/ttyAMA5
rz waiting to receive.Retry 0: Got ERROR
Retry 0: Got ERROR
Retry 0: TIMEOUT
Retry 0: Bad CRC
Retry 0: Bad CRC
Retry 0: Bad CRC
Retry 0: Got ERROR
Retry 0: Bad CRC
Retry 0: Bad CRC
Retry 0: Bad CRC
Retry 0: Got ERROR
^Crz: caught signal 2; exiting
uart5 device-tree setting
decompile
serial@810c510000 {
compatible = "arm,pl011\0arm,primecell";
reg = <0x81 0xc510000 0x00 0x10000>;
interrupts = <0x00 0xab 0x04>;
clocks = <0x02 0x36 0x02 0x16>;
clock-names = "uartclk\0apb_pclk";
assigned-clocks = <0x02 0x36>;
assigned-clock-parents = <0x02 0x16>;
dmas = <0x133 0x0b 0x0b 0x800 0x133 0x0b 0x15 0x800>;
dma-names = "rx\0tx";
dma-coherent;
arm,primecell-periphid = <0x51011>;
resets = <0x02 0x51>;
reset-names = "serial";
status = "okay";
iommus = <0x05 0x80b>;
phandle = <0x290>;
};
--------------------------------------------------------------------------
tegra264.dtsi
uart5: serial@810c510000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x81 0x0c510000 0x0 0x10000>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA264_CLK_UART5>,
<&bpmp TEGRA264_CLK_PLLP_OUT0>;
clock-names = "uartclk", "apb_pclk";
assigned-clocks = <&bpmp TEGRA264_CLK_UART5>;
assigned-clock-parents = <&bpmp TEGRA264_CLK_PLLP_OUT0>;
dmas = <&gpcdma 11 11 TEGRA_SID_GPCDMA>,
<&gpcdma 11 21 TEGRA_SID_GPCDMA>;
dma-names = "rx", "tx";
dma-coherent;
arm,primecell-periphid = <0x00051011>;
resets = <&bpmp TEGRA264_RESET_UART5>;
reset-names = "serial";
status = "disabled";
};
customer board
bus@0 {
serial@810c510000 {
status = "okay";
iommus = <&smmu1_mmu TEGRA264_GPCDMA_SID_UART5>;
};
}
Pinmux setting
uart5_tx_pj3 {
nvidia,pins = "uart5_tx_pj3";
nvidia,function = "uartf_txd";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
};
uart5_rx_pj4 {
nvidia,pins = "uart5_rx_pj4";
nvidia,function = "uartf_rxd";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
};
dmsg as attached
Any suggestions or pointers on how to resolve or debug this issue would be greatly appreciated.
Thanks!
dmesg.log (1.1 MB)