TK1 - RAM_CODE[3:0] bootstrap pins

Tegra K1 uses RAM_CODE[3:0] bootstrap pins in the bootup process for choosing the DRAM configuration (set wihtin BCT) and the secondary boot device (set within BCT). [Ref: Tegra K1 Embedded Platform Design Guide.pdf]

Is there any detailed documentation regarding the above information. The first statement is

  1. Choosing DRAM configuration -> It means we can have more than one DRAM configuration and choose any one based on these two pin straps? How it is handled in Jetson. Does the BCT for Jetson include DRAM configuration for more than one memory chips?

  2. Choosing the secondary boot device -> It means we can have other devices (Say, another external SD card) as boot device, so that ROM will read bootloader from the other device (external SD card)?

Thanks.

For info:
http://http.download.nvidia.com/tegra-public-appnotes/bct-overview.html