Trace log - rtcpu_nvcsi_intr status:0x00000044

Hi there,

I’m developing GMSL drivers on our own GMSL carrier board.
When I use x2 lanes, all the eight ports from CSI-0 to CSI-7 are good.
But when I change to x4 lanes. only CSI-6 and CSI-7 not work.
I’ve confirmed the stream ID for CSI-6/7 are configured to <5>.
And the trace log shows below:

rtcpu_string: tstamp:15814494248 id:0x04010000 str:"VM0 activating."
rtcpu_vinotify_event: tstamp:15814948962 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:506068036608 data:0x379e300010000000
rtcpu_vinotify_event: tstamp:15814949156 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:506068043104 data:0x0000000031000001
rtcpu_vinotify_event: tstamp:15814949349 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:506068093984 data:0x379e2d0010000000
rtcpu_vinotify_event: tstamp:15814949518 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:506068100544 data:0x0000000031000002
rtcpu_nvcsi_intr: tstamp:15852275939 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000044
rtcpu_nvcsi_intr: tstamp:15852276655 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000044
rtcpu_nvcsi_intr: tstamp:15852277368 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000044
rtcpu_nvcsi_intr: tstamp:15852278081 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000044
rtcpu_nvcsi_intr: tstamp:15852278797 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000044
rtcpu_nvcsi_intr: tstamp:15852279511 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000044
rtcpu_nvcsi_intr: tstamp:15852280226 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000044
.
.
.

How can I figure out the status code?
Is it a hardware issue?
Thanks.

Ting

hello ting.chang,

the error code 0x44 indicate there’re more than one bit error has detected on data-lane.

had you examine the port bindings, To verify the port binding result.
could you please share the device tree settings for reference, thanks

Hi Jerry,
media0_info.txt (6.2 KB)
device_tree.dts (51.8 KB)

Can I know how to verify the port binding by using media-ctl?
The attachments are the result of media-ctl and the device tree, thank you.

Because our GMSL carrier board is newly-designed, I’m verifying its quality and wonder if there are any hardware issues on this new board.
Does “more than one bit error has detected on data-lane” mean a hardware issue?

hello ting.chang,

it’s illustrate port binding as following. Sensor --> NVCSI --> VI

please check developer guide, Jetson Virtual Channel with GMSL Camera Framework.
dst-csi-port it should be the destination CSI port on the Jetson side, connected at deserializer. this maps to camera connected at deserializer.
may I know what’s the real camera connections? it looks all of your 8 nodes were setting dst-csi-port = "a";.

it should be, please review your sensor config.

Hi Jerry,

I can’t find an DTS example using different dst-csi-port. If dst-csi-port is wrong in my DTS file, why the cameras work under x2 lanes configuration?

All the eight cameras are using MAX9295 as serializers and connect to four MAX9296 on our GMSL board.

CAM0 → MAX9296-0 → NVCSI (VC=0, csi-port=0, stream-id=0)
CAM1 → MAX9296-0 → NVCSI (VC=1, csi-port=0, stream-id=0)
.
CAM2 → MAX9296-1 → NVCSI (VC=0, csi-port=2, stream-id=2)
CAM3 → MAX9296-1 → NVCSI (VC=1, csi-port=2, stream-id=2)
.
CAM4 → MAX9296-2 → NVCSI (VC=0, csi-port=4, stream-id=4)
CAM5 → MAX9296-2 → NVCSI (VC=1, csi-port=4, stream-id=4)
.
CAM6 → MAX9296-3 → NVCSI (VC=0, csi-port=6, stream-id=5)
CAM7 → MAX9296-3 → NVCSI (VC=1, csi-port=6, stream-id=5)

Similar to this picture but with different virtual channels.
image

please also review the settings within tegra-camera-platform {}.
for example,
since you’ve 8 camera in the system, you may use the hex value to assign the position property.
the num_csi_lanes setting within tegra-camera-platform {} is total CSI lanes going to enable for the system.

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