We are using a real time video processing system:
- The system collects 2 channels of video ( from cameras with 8M pixels, 60fps each) through a customized FPGA board (Xilinx Zynq UltraScale+ MPSoc).
- The collected MIPI data is converted into RAW data to GPU on Jetson AGX Xavier via PCIE for further processing.
- We want to use GPUDirect RDMA to transfer the data to GPU
- Currently, we have run the code of GitHub - NVIDIA/jetson-rdma-picoevb: Minimal HW-based demo of GPUDirect RDMA on NVIDIA Jetson AGX Xavier running L4T
Our questions are:
-
- how can GPU be noticed when the data transfer is started and stopped
- with what scheme, can we achieve lowest lantency and fastest speed data transfer
- how to transfer the RAW data from FPGA to GPU while keeping its integrity
- does Nvidia provide API / functions to deal such video stream transfer issue
jinl
2
Hi there! Could you please elaborate on the 4 questions a bit more and give more context to them? Happy new year!
We are using a real time video processing system:
- The system collects 2 channels of video ( from cameras with 8M pixels, 60fps each) through a customized FPGA board (Xilinx Zynq UltraScale+ MPSoc).
- The collected MIPI data is converted into RAW data to GPU on Jetson AGX Xavier via PCIE for further processing.
- We want to use GPUDirect RDMA to transfer the data to GPU
Currently, we have run the code of GitHub - NVIDIA/jetson-rdma-picoevb: Minimal HW-based demo of GPUDirect RDMA on NVIDIA Jetson AGX Xavier running L4T
Our questions are:
- how can GPU be noticed when the data transfer is started and stopped
- with what scheme, can we achieve lowest latency and fastest speed data transfer
- does Nvidia provide API / functions to deal such video stream transfer issue
Thanks in advances