regarding nvdisply I was under the impression from the TRM document that
nvdisplay@15200000 is HEAD0
nvdisplay@15210000 is HEAD1
nvdisplay@15220000 is HEAD2
and anyone of the “heads” can have either:
nvidia,dc-or-node = “/host1x/dsi”;
nvidia,dc-connector = <&dsi>;
nvidia,dc-or-node = “/host1x/sor1”;
nvidia,dc-connector = <&sor1>;
nvidia,dc-or-node = “/host1x/sor”;
nvidia,dc-connector = <&sor0>;
Current information is not enough to debug. Also, I want to know why do you want to move dsi from head 0 to head 1? It seems pointless to do such change when you don’t know whether it could bring up or not. You should use the original setting first. At least head 0 is able to run dsi A.
I don’t think this bug would be fixed in near future. If you want multiple display case, I would suggest you to use DP and HDMI.
We have a problematic signal layout for the lanes coming from HEAD0 as a result the 24bit signal (which comes at 445MHz instead of 297[MHz) for 16-bit) is corrupted for the signal to be parsed by the DSI Rx (implemented by the FPGA). The lanes from DSI-C are correct.
problematic signal layout for the lanes coming from HEAD0
Sorry that I cannot get it. Are you trying to say hardware design problem?
There is no “lanes coming out from HEAD0”.
HEAD0 is just a virtual concept. It does not mean any physical pin.
For example, SOR0 node which represent DP0 pins can be assigned to HEAD0. And it can be assigned to HEAD1 too. In each case (HEAD0/HEAD1), the hardware connection are same but just on different display controller. Different display controller means it is possible has different software configuration.
Thus, what you are trying to do is
You set DSI-C to either head0 or head 1 and the result are different. I would say this may be just because some other software configuration are different…
And if you can understand above, then “trying to put DSI-C to HEAD0 instead of DSI-A” is also not a very precise statement. What you really do is “putting dsi contoller as dc-connector to headX”. And what you need to do next is configure the dsi node to let it output signal from DSI-C.
I understand that the HEADs are virtual connection and eventually the physical output is via the DSI lanes. I meant that the DSI-A 4 lanes are incorrectly routed on the customer board, while the DSI-C 4 lanes are routed correctly - from the signal integrity prespective. That is the lanes of DSI-C are capable to convey the higher frequnce signals while those of DSI-A - cannot.
Now practically, I gave connected the dsi controller to HEAD0. How can I make HEAD0 route the signal to a panel that is attached to DSI-C only by setting nvidia,dsi-instance = <2>;? I have done it and I get no signal from the DSI-C lanes.