Two questions about SPE programing

[Luna2020]

Hi NV_Team,

I am using Jetson AGX Orin(R36.3.0), I have followed the entire instruction manual, and SPE gpio-app works fine as the document.

I have several question about SPE.

1. How can I pass parameters to gpio_app_task(void *pvParameters) , because I want to dynamic change the GPIO_OUT_SET_DELAY value, can we transfer it through (void *pvParameters).

2. GTE can only get input timestamp? If we want to get output gpio timestamp, how to implement ?

void gte_app_init(void)
{
        /* Enable GPIO_APP_IN GPIO GTE timestamp */
		tegra_gte_slice_set_enable_mask(&tegra_gte_id_aon,
										2, /* slice number 2 */
										BIT(GTE_SLICE_IRQ_GPIO));

	       	error_t ret = tegra_gte_setup(&tegra_gte_id_aon, GTE_TEST_FIFO_OCCUPANCY,
										gte_irq_callback, 0, 0, 0);
		if (ret)
			error_hook("GTE setup failed\r\n");

		/* Enable timestamping on GPIO_APP_IN at GPIO controller */
		ret = tegra_gpio_enable_timestamp(GPIO_APP_IN);
		if (ret)
			error_hook("gpio_enable_timestamp -failed\r\n");
}

[jachen]

Hello,

1. I think that’s a general FreeRTOS question. Though I’ve not tried, I guess following code is worth trying.
   1.1 Replace the .pvParameters = NULL, as a pointer to parameter structure.
   1.2 In task routine, that’s read-only.
   1.3 In other task, you can change the value which is pointed by that pointer.
   1.4 task routine should be able to get the updated parameter every call.
2. Generally, the GPIO output is set by software, so it cannot be timestamped by hardware, since there’s no such event triggered. I guess you can record the timestamp before or after GPIO setting. Though it’s software timestamp, the difference should be a constant since it runs in RTOS, as long as interrupt is disabled.

br
ChenJian

[Luna2020]

Hi Jachen,

Thanks for you information, about no.1 I tried to get understand.

My question still is how to pass value to .pvParameters from AGX Orin CPU to Cortex-R5 CPU, because there is no any docs or sample code about AGX Orin and Cortex-R5 CPU comunication?

[jachen]

@Luna2020

My question still is how to pass value to .pvParameters from AGX Orin CPU to Cortex-R5 CPU, because there is no any docs or sample code about AGX Orin and Cortex-R5 CPU comunication?

Regarding to this, you can take a look at rt-aux-cpu-demo-fsp/doc/ivc.md, which provides a channel between CCPLEX (Linux) and SPE R5 (FreeRTOS).
Anyway, to make a real app, it still needs more code, but not so difficult.

br
ChenJian

[Luna2020]

Okay， thanks