Just FYI, you can make the lspci output format nicely on the forum if you edit your post with the lspci info via the “pencil” icon in the upper right (hover the mouse over the quote in upper right and other icons will pop up), and when editing highlight the whole lspci output and then click on the “block quote” icon in upper right (looks like “</>”). The indentation will be preserved.
On the PCIe side: The bridges at 00:01.0 and 01:00.0 are running at 5GT/s, so with four lanes these PCIe bridges will not be a limit of bandwidth.
For bridges at: 02:01.0, 02:05.0, 02:07.0, 02:09.0: These bridges are also running 5GT/s, but use only one lane…this would be a limitation on bandwidth for any of the higher bandwidth devices, but not for any single device (these show as an 8-lane 8-port bridge, but only one lane is used per port). I’m not positive, but I think what you have there is essentially a splitter where the host side has many lanes available, but only a single lane is ever dedicated to data passing through it to any particular PCIe end point. One lane is certainly fast enough to not limit any individual device, but if two devices are put on a single lane you could hit bandwidth limitations. It might be of interest to see layout via:
sudo lspci -t
The USB3 controllers at 03:00.0, 04:00.0, 05:00.0, and 06:00.0 run at the full 5GT/s of PCIe V2, but each uses only a single PCIe lane. This means the PCIe side has roughly a peak throughput of (5Gbit/s * 8bit/10bit) = 4Gbit/s available regardless of peak USB3 speed. USB3 is listed as 5Gbit/s (overhead means actual data transferred is less than 5Gbit/s, but all of the overhead must pass through the PCIe lane). If a single USB3 device is connected to the single lane PCIe at PCIe V2, then that device cannot quite reach its raw throughput of 5Gbit/s (though it can come close for your purposes). Do you connect more than one device to any USB3 port? If so, what is the combined bandwidth required for all of the devices on that port (e.g., through a USB3 HUB)? You should probably be ok on bandwidth if only a single high-usage USB device is on a given port…you will run into limitations fast if more than one high bandwidth device is connected via HUB to a single port.
I’m not positive about any individual camera bandwidth, it looks like you would not have problems if each USB3 port has its own PCIe V2 lane, and if only one device is connected per USB3 port. A tree of USB topology (“lsusb -t”) and PCIe topology (“lspci -t”) might show if best use of PCIe and USB3 are arranged to make best use of bandwidth.