TX2-4GB NVCSI/VI error with JetPack 4.3

Robotics & Edge Computing Jetson & Embedded Systems Jetson TX2
2

Give a try this patch.

diff --git a/drivers/media/platform/tegra/camera/vi/vi4_fops.c b/drivers/media/platform/tegra/camera/vi/vi4_fops.c
index 6d2d750..bb16ed6 100644
--- a/drivers/media/platform/tegra/camera/vi/vi4_fops.c
+++ b/drivers/media/platform/tegra/camera/vi/vi4_fops.c
@@ -62,6 +62,15 @@ u32 csimux_config_stream[] = {
        CSIMUX_CONFIG_STREAM_5
 };
 
+u32 csimux_notify_mask_stream[] = {
+       CSIMUX_NOTIFY_MASK_STREAM_0,
+       CSIMUX_NOTIFY_MASK_STREAM_1,
+       CSIMUX_NOTIFY_MASK_STREAM_2,
+       CSIMUX_NOTIFY_MASK_STREAM_3,
+       CSIMUX_NOTIFY_MASK_STREAM_4,
+       CSIMUX_NOTIFY_MASK_STREAM_5
+};
+
 static void vi4_write(struct tegra_channel *chan, unsigned int addr, u32 val)
 {
        writel(val, chan->vi->iomem + addr);
@@ -449,6 +458,7 @@ static int tegra_channel_capture_setup(struct tegra_channel *chan,
        vnc_id = chan->vnc_id[index];
 
        vi4_write(chan, csimux_config_stream[csi_port], 0x1);
+       vi4_write(chan, csimux_notify_mask_stream[csi_port], (0x0F << 16));
 
        vi4_channel_write(chan, vnc_id, MATCH,
                        ((stream << STREAM_SHIFT) & STREAM) |
diff --git a/drivers/media/platform/tegra/camera/vi/vi4_registers.h b/drivers/media/platform/tegra/camera/vi/vi4_registers.h
index 588ebb3..6a4205b 100644
--- a/drivers/media/platform/tegra/camera/vi/vi4_registers.h
+++ b/drivers/media/platform/tegra/camera/vi/vi4_registers.h
@@ -50,6 +50,14 @@
 #define CSIMUX_CONFIG_STREAM_3         0x430
 #define CSIMUX_CONFIG_STREAM_4         0x434
 #define CSIMUX_CONFIG_STREAM_5         0x438
+
+#define CSIMUX_NOTIFY_MASK_STREAM_0    0x440
+#define CSIMUX_NOTIFY_MASK_STREAM_1    0x444
+#define CSIMUX_NOTIFY_MASK_STREAM_2    0x448
+#define CSIMUX_NOTIFY_MASK_STREAM_3    0x44c
+#define CSIMUX_NOTIFY_MASK_STREAM_4    0x450
+#define CSIMUX_NOTIFY_MASK_STREAM_5    0x454
+
 #define FRAMEIDGEN                                     (0xf << 26)
 #define STICKYFAULT                                    (0x1 << 25)
 #define VPR                                                    (0x1 << 24)