TX2 carrier board conversion to TX2i - TX2i not booting except into recovery


I have a custom carrier board for the TX2 that I am trying to get working with a TX2i and the TX2i does not boot.

  • Both systems are running their respective jetpack 4.6.4 for the development kit.
    • I have modified it to output the boot logs on UART1 instead of UART0 as per this post as my board has no UART0 output available
  • The TX2i will boot completely fine into recovery but not otherwise
  • I have verified both the TX2 and TX2i on a commercial carrier and they both work fine on it
  • I have verified the TX2 booting and the TX2i not booting using the UART output available on boot
    • The TX2 outputs on both my carrier and the commercial one, the TX2i only on the commercial one
  • I have software control of the PWR_BTN pin, and have set it so that when the TX2i is present, the pin is held high to achieve the auto power on behaviour
  • Both boards reach the CARRIER_PWR_ON state
  • I am using a 12V power rail and the VIN_PWR_BAD pin on the TX2i is high when the module is powered which I understand indicates the power supply is not the issue

Please could you help me solve this, my main questions are:

  • are there any differences to the power up sequence between the TX2 and the TX2i other than the PWR_BTN behaviour?
  • is there anything I can do to investigate boot issues before cboot in the boot flow?
  • is there anything else you think could help with this? as I have run out of ideas for what to test



First of all, how did you flash the device?
Are you flashing it with the right config file?


I was flashing it using the flash.sh script with jetson-tx2i mmcblk0p1 as the arguments, however the issue has been persistent when flashing this way and with our custom yocto based firmware.

I have since managed to find the issue, after leaving it running overnight at some point it entered cboot and output

cb_vic_scrub: VIC Scrub Failure, error 0x6, cmd = 0x1

over uart.

which led me to this post and this post talking about the DRAM ECC scrub failing if the on UART0_RTS and UART1_TX pins are biased on startup.

I was able to resolve the issue by setting disable_staged_scrub=1; in tegra186-mb1-bct-misc-si-l4t-storm.cfg

If this is likely to cause problems in future please let me know, otherwise thank you for your swift response.

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There is no update from you for a period, assuming this is not an issue any more.
Hence we are closing this topic. If need further support, please open a new one.

Sorry for the late response.
Is this still an issue to support? Any result can be shared?