TX2 DSI Driver: ECC + Checksum for Long Packets

im working on DSI Displays for TX2.
im creating an init cmd for my display, using the panel-s-wqxga-10-1.dtsi file as template.

the init comand for the nivdia panel-s-wqxga-10-1 is beginning with

<TEGRA_DSI_PACKET_CMD DSI_GENERIC_LONG_WRITE 0x3 0x0 0x0 0x10 0x00 0x2A 0x0 0x0>

/* Long  Packet: <PACKETTYPE[u8] COMMANDID[u8] PAYLOADCOUNT[u16] ECC[u8] PAYLOAD[..] CHECKSUM[u16]> */

im wondering why the ECC and Checksum fields are emty (0x00). is the calculation of done by the dsi driver or the display dont support ecc+ crc?
my display need ecc+ crc, do i need to fill this fields? do you have an calculator for this (CRC-16-CCITT)?

I think below material may help your case. Please read section starting from in TRM.

That is the programming guide of how to configure ECC/CS. You need to enable ECC and Checksum through register.

Also, the generation of ECC is written in 31.8.14.

Tegra X2 (Parker Series SoC) Technical Reference Manual

Hi Wayne, Thanks for your answer. i already read the dsi section of the TRM. the hardware is able to generate ECC and checksum by itself - this is mandatory for the videomode with crc.
my question is more directed into the implementation of your driver in using the command mode.
in TRM is mentioned that:

and i dont know if your driver do this step for me - or if i need to calculate the crc in excel before compiling the device tree file panel-s-wqxga-10-1.dtsi
perhaps someone has experience in setup dsi displays for this hardware

HI PeterLustig,

Please refer to kernel/display/video/tegra/dc/dsi.c.

We put the calculation in tegra_dsi_ecc().