Hi NV Team,
From “NVIDIA JETSON TX1 MIPI DSI/CSI DESIGN AND TUNING”
DA-08352-001_v01 | December 2016
(1)It says we can use DSI_PHY_TIMING, where can we find the meaning of each bit in this register?
(2)we have test fail in MIPI test:
Data-to-clock skew (TSKEW TX),
HS Clock TX 20%-80% Rise Time,
HS Clock TX 80%-20% Fall Time.
Is there any register to tune above parameters?