TX2 DTS/DTB with PCIE x4

I had a DTS/DTB issue with the USB2.0 on a custom PCB with TX2. See this post:

https://devtalk.nvidia.com/default/topic/1028223/jetson-tx2/tx2-usb-not-work/post/5277808/#5277808

I am also having an issue with the PCIe connected to a Xilinx Artix 7. I developed my FPGA code using the Xilinx AC701 connected to the TX2 carrier board and that prototype system works well. However the custom PCB with TX2 socketed and the Artix 7 placed on the board does not work. The PCIe does not show up in the lspci and the dmesg shows:

dmesg | grep pcie
[    0.142409] node /plugin-manager/fragment-500-pcie-config match with board >=3310-1000-500
[    0.143141] node /plugin-manager/fragment-500-e3325-pcie match with board >=3310-1000-500
[    0.265588] iommu: Adding device 10003000.pcie-controller to group 50
[    6.111281] tegra-pcie 10003000.pcie-controller: 4x1, 1x1 configuration
[    6.122903] tegra-pcie 10003000.pcie-controller: PCIE: Enable power rails
[    6.132412] tegra-pcie 10003000.pcie-controller: probing port 0, using 4 lanes
[    6.145123] tegra-pcie 10003000.pcie-controller: probing port 2, using 1 lanes
[    6.594197] tegra-pcie 10003000.pcie-controller: link 0 down, retrying
[    7.262219] tegra-pcie 10003000.pcie-controller: link 0 down, retrying
[    7.697787] tegra-pcie 10003000.pcie-controller: link 0 down, retrying
[    7.724253] tegra-pcie 10003000.pcie-controller: link 0 down, ignoring
[    8.140188] tegra-pcie 10003000.pcie-controller: link 2 down, retrying
[    8.554212] tegra-pcie 10003000.pcie-controller: link 2 down, retrying
[    8.970217] tegra-pcie 10003000.pcie-controller: link 2 down, retrying
[    8.978790] tegra-pcie 10003000.pcie-controller: link 2 down, ignoring
[    8.985878] tegra-pcie 10003000.pcie-controller: PCIE: no end points detected
[    8.993274] tegra-pcie 10003000.pcie-controller: PCIE: Disable power rails

Inspection inside the FPGA shows that the TX2 is not providing the PCIe reference clock on the custom PCB. I am wondering if there is another device tree issue with the TX2.

FYI, this is the dmesg for the AC701 edge connected to the TX2 carrier board and using the same FPGA program:

dmesg | grep pcie
[    0.142576] node /plugin-manager/fragment-500-pcie-config match with board >=3310-1000-500
[    0.143286] node /plugin-manager/fragment-500-e3325-pcie match with board >=3310-1000-500
[    0.265951] iommu: Adding device 10003000.pcie-controller to group 50
[    6.639866] tegra-pcie 10003000.pcie-controller: 4x1, 1x1 configuration
[    6.649505] tegra-pcie 10003000.pcie-controller: PCIE: Enable power rails
[    6.660783] tegra-pcie 10003000.pcie-controller: probing port 0, using 4 lanes
[    6.672817] tegra-pcie 10003000.pcie-controller: probing port 2, using 1 lanes
[    7.154781] tegra-pcie 10003000.pcie-controller: link 2 down, retrying
[    7.568811] tegra-pcie 10003000.pcie-controller: link 2 down, retrying
[    8.124815] tegra-pcie 10003000.pcie-controller: link 2 down, retrying
[    8.134291] tegra-pcie 10003000.pcie-controller: link 2 down, ignoring
[    8.142087] tegra-pcie 10003000.pcie-controller: PCI host bridge to bus 0000:00
[    8.299775] pcieport 0000:00:01.0: enabling device (0000 -> 0002)
[    8.306887] pcieport 0000:00:01.0: Signaling PME through PCIe PME interrupt
[    8.322665] pcie_pme 0000:00:01.0:pcie01: service driver pcie_pme loaded
[    8.330369] aer 0000:00:01.0:pcie02: service driver aer loaded
[    8.344103] tegra-pcie 10003000.pcie-controller: speed change : Gen-1 -> Gen-2

Hello,

Which x4 configuration are you using? Some debug method are listed in this elinux page.
https://elinux.org/Jetson/TX2_USB

You could check /proc/device-tree during runtime and see what is the exact device tree you are using.

This issue has been resolved as a board design issue and not anything to do with the TX2.