Tx2 uart7 rx func err

I did a test:
Restore the serial port in tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb to 0x07, and then flash in. The error phenomenon is the same. This also indirectly indicates that the modification of ucm2.dtb does not take effect correctly.

I also continued to do this test:
Put {my_ path}/hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill- common.dtsi Document’s serial@c290000 status = “disabled”;
Then: make O = $TEGRA_ KERNEL_ OUT dtbs
I found Linux_ for_ Tegra/kernel/dtb/tegra186-quill-p3310-1000-c03-00- base.dtb No update, also confirmed after decompiling to DTS serial@c290000 status != “disabled”;
I’ll go on. / apply_ binaries.sh After that, check the above DTB file again, but it is still not updated.
This shows that topic in 54572, #49 , When I followed these steps, they didn’t work,Which part of me is wrong? Please check it for me, thanks a lot!
https://forums.developer.nvidia.com/t/how-to-enable-uart7-d8-d5-as-normal-uart-like-other-uart-uartc-c280000/54572/49

could you please have a try to disassembler the dtb file into text file for modification,
for example,
$ dtc -I dtb -O dts -o temp.dts tegra210.dtb

then, convert the DTS into a DTB for flashing
$ dtc -I dts -O dtb -o output.dtb temp.dts

you may refer to Flashing a Specific Partition to enable -k options to flash kernel-dtb partition.
or, you may generate sign/encrypt file locally,
for example
$ sudo ./flash.sh --no-flash -r -k kernel-dtb jetson-tx2 mmcblk0p1
after that, you may using dd commands to overwrite device tree partition.
thanks

Thanks for your reply!
the problem of modifying dtsi and making it effective is clear to me.

1.Modify hardware /NVIDIA/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-common.dtsi
2.make O=$TEGRA_ KERNEL_ OUT dtbs
3. Generate the DTB file in $Tegra_ KERNEL_ Out / arch / arm64 / boot / DTS / directory
4.flash.sh -r -k kernel-dtb… This command defaults to writing DTB files in Linux_ for_ Tegra / kernel / DTB / directory
5.cp $TEGRA_ KERNEL_ OUT/arch/arm64/boot/dts/tegra186-quill-p3310-1000-c03-00- base.dtb Table of contents for step 4
6. flash.sh -r -k kernel-dtb jetson-tx2 mmcblk0p1
At this point, the modified dtsi takes effect.

I suspect that the problem is in this step. I’ll see how to further investigate and confirm.Please give guidance

https://forums.developer.nvidia.com/t/internal-tx2-traffic-on-uart7/56904/2

I found the most official and the earliest topic of this problem. I followed this step and modified or not to 0xff. The phenomenon is the same: uart7 is sent normally, and there is an error in receiving. Bpmp failed to configure uart7. I don’t know what causes this phenomenon.
In addition, is the source code of bpmp low-level program open, and where can I get it?

I can access this information on uart7 now