U-boot for mocha

Hello, Nvidia developers.
I’m from russian and my englsih is bad :)
But I need to ask.
My device is Xiaomi MiPad (Tegra k1).

A little background. When Xiaomi posted the kernel sources, I started porting the changes to the source code of the shieldtablet kernel, and now everything works on the ported kernel (latest 3.10.33 kernel). There were difficulties, because our bootloader does not support psci, but in 33 kernel I successfully ported the tegra_smc_generic interface, which was probably written in Nvidia, along with the bootloader, maybe you can give the source code of bootloader?)

Then I started porting the last l4t kernel for jetson tk1 and Linux4Tegra. I’m in process, but it boot and display, touchscreen and etc works fine.

Now I started to port 3.10.97 kernel from shieldtablet, and this is very hard work, and psci is very necessary for work tegra cpuquite, and other components of kernel. And I decided to port U-boot.

I update pinmux(deprecated safe func), set gpio and set power to vdd_cpu, vdd_core and vdd_gpu, create simple dtb file for U-boot(edited jetson tk1 dtb), but it do not start.

When U-boot is booted, the processor starts to make noise with a cyclic periodicity. The same effect occurs if you load the stock bootloader with the edited bct file.

Can you help me?

Xiaomi mocha have all complect for flash from Nvflash.
May be you can share me source code of bootloader? or you can update bct file? or datasheet of motherboard E1780(it the board base). Any help please, Nvidia. You chip Tegra K1 is a good product, but support of Xiaomi is very bad, we get only Android 4.4.4… and nothing.

This is bct file: https://pastebin.com/n0bPgZ70

Hi Insei

Thanks for your question and your explanation is quite clear. NVIDIA does not own MiPad bootloader or kernel. Not quite sure what you are trying to accomplish here. However, for an official support of TK1-based platform from NVIDIA, you might want to look into Jetson TK1 with Linux4Tegra (L4T) BSP (even better Jetpack) from NVIDIA to start your work. The board is quite affordable and you will be able to jump start your development right away with official support from us. From here, you could even move to TX1 or TX2 for latest AI-related works. That will be our recommendation.

Jetpack: https://developer.nvidia.com/embedded/jetpack
SW information for TK1, TX1 and TX2: https://developer.nvidia.com/embedded/develop/software

Thanks

May be yoy can say about this error, this is L4T R21.5:

sudo ./nvflash --instance 0 --bct mocha_bct.cfg --setbct --configfile flash.cfg --create --bl fastboot.bin --odmdata 0x49C000 --wait --go
Nvflash 4.13.0000 started
BR_CID: 0x34001001740db0890c0000000aff0400
rcm version 0X400001
Skipping BoardID read at miniloader level
System Information:
   chip name: unknown
   chip id: 0x40 major: 1 minor: 1
   chip sku: 0x0
   chip uid: 0x00000001740db0890c0000000aff0400
   macrovision: disabled
   hdcp: disabled
   jtag: disabled
   sbk burned: false
   board id: 0
   warranty fuse: 0
   dk burned: false
   boot device: emmc
   operating mode: 3
   device config strap: 0
   device config fuse: 0
   sdram config strap: 0

RCM communication completed
BCT sent successfully
sending file: tegra124-mocha.dtb
- 85511/85511 bytes sent
tegra124-mocha.dtb sent successfully
odm data: 0x49c000
downloading bootloader -- load address: 0x83d88000 entry point: 0x83d88000
download command failed NvError 0x120002
command failure/warning: bootloader download failed (bad data)

IN L4T R19.3:

./nvflash --instance 0 --bct mocha_bct.cfg --setbct --configfile flash.cfg --create --bl fastboot.bin --odmdata 0x49C000 --wait --go
Nvflash 4.13.0000 started
chip uid from BR is: 0x34001001740db0890c0000000aff0400
rcm version 0X400001
Skipping BoardID read at miniloader level
System Information:
   chip name: unknown
   chip id: 0x40 major: 1 minor: 1
   chip sku: 0x27
   chip uid: 0x00000001740db0890c0000000aff0400
   macrovision: disabled
   hdcp: enabled
   jtag: enabled
   sbk burned: false
   board id: 0
   warranty fuse: 0
   dk burned: true
   boot device: emmc
   operating mode: 3
   device config strap: 0
   device config fuse: 0
   sdram config strap: 0

RCM communication completed
BCT sent successfully
odm data: 0x49c000
downloading bootloader -- load address: 0x80108000 entry point: 0x80108000
sending file: fastboot.bin
- 900492/900492 bytes sent
fastboot.bin sent successfully
waiting for bootloader to initialize
usb read error (71): Protocol error
bootloader failed NvError 0x0
command failure/warning: bootloader download failed

Why can there be such a mistake?
This is software problem? Give a hint please how to fix it

For reference:

0x00120002, "packet was nacked"

In most cases this would be a communications error, e.g., USB. This seems to pop up a lot during flashes when using a VM host. A marginal USB cable might also be an issue.

Thank you.

I have another question, could you give information, was the tegra-19r15.1-android-4.4 bootloader in your development? and if yes, can you give me source? please

I have no knowledge about that, someone else would have to answer. However, since android is not supported, my guess is that likely that this particular boot loader code was from a third party.

Okay, thank you.
I have one more question: How i can get the reg of the pmic information?
In my device, pmic is TPS65913, this is no standart for the Tegra k1, it’s chip for tegra 4, but in my device use it’s chip. I need help, i know that TPS65913 automatic set voltage for CORE_VDD, okay this is good, but i can’t find adress for the other regulators of the pmic chip: LDO9, SMP45 and SMP7, may be you know how to get this adresses. it’s regulators for SDMMC, CPU_VDD and GPU_VDD.
In line 147 enable emmc for jetson tk1 (in my device gerulator LDO9) http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/u-boot.git;a=blob;f=board/nvidia/jetson-tk1/jetson-tk1.c;h=75972d598f939fd94fa6ed94fa629c3d5eb3cf05;hb=75972d598f939fd94fa6ed94fa629c3d5eb3cf05#l47
In this func. set CORE_VDD, CPU_VDD and GPU VDD voltage: http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/u-boot.git;a=blob;f=board/nvidia/venice2/as3722_init.c;h=8d607b573e7247b2d2461bf40a1543dee86db8c1;hb=3127911fc289cc8155cbdfafc5ab14cb98ee7fa3#l31
And here sets reg(i need it for my pmic chip in my device. It’s specific info? or i can get it?http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/u-boot.git;a=blob;f=board/nvidia/venice2/as3722_init.h;h=6eda1ba335e3bc34d83041adf023840551283ad4;hb=3127911fc289cc8155cbdfafc5ab14cb98ee7fa3
Now i use latest mainline U-boot, it’s boot and heats the chip of emmc to 40-46 Celsius, but no more. I think that problem in pmic voltage or reg. What do you think? Can you help me?

I do not know about the particular chip, but basically anything about the PMIC would be in the Technical Reference Manual. See:
https://developer.nvidia.com/embedded/tegra-k1-reference

Anyone here know of a more specific document for this?

oh okay, may be you can say me why i2c adress of pmic(AM as3722) on Jetson tk1 have in L4T kernel adress reg 0x40(in dtb
http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/u-boot.git;a=blob;f=arch/arm/dts/tegra124-jetson-tk1.dts;h=e7b66d81a499e683bba22b21110798f75dcb9918;hb=abb72c2f02b7d1759c18dc6b859043f187a4a9b8#l79), but in the U-boot i2c adress of pmic is 0x80(in code AS3722_I2C_ADDR http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/u-boot.git;a=blob;f=board/nvidia/venice2/as3722_init.h;h=6eda1ba335e3bc34d83041adf023840551283ad4;hb=3127911fc289cc8155cbdfafc5ab14cb98ee7fa3#l10), why it’s switch? Or this info only for Nvidia developer’s of board?

I doubt you’re seeing the difference of using the SMMU translation versus not using the SMMU (those look like base address offsets and would be independent of the base address…plus I don’t know if SMMU is used on i2c). More likely is that the i2c controllers have a register address range of 256 bytes, and you might be looking at different register bits within that 256 byte address range (the goal of those code sections might be different…I have not studied it). See the TRM bit table in section 33.5.1 for bit 8 versus bit 7 purpose.

Many thanks for the clarification. I will try to understand this.