Uart flow control on Jetson Nano



Is anyone try to use Uart flow control on Jetson Nano J1, I found some problem.

I need to use RTS signal on J41 pin 11 but is not working.

first I modify DTS with Excel like pictue, recompile and edit “/boot/extlinux/extlinux.conf” verify kernel is use new dtb file with dmesg like picture.

i test with 2 method

first with “GitHub - cbrake/linux-serial-test: Linux Serial Test Application” enable rtscts control uart can transmit but no voltage change on rts and cts pin.

second i test with command “sudo /sbin/getty -L 9600 ttyTHS1 -h” -h mean enable flow control. but result same as method one.

third i test with my C code by uart config like the picture, same result.

i verify with logic analyzer, it no level change on rts and cts pin but change on tx and rx signal.

my test environment.
jetson nano devkit rev b01
i verify that pin 11 on J41 is working by control gpio test.

what I missing or need to modify other to enable uart flow control?


hello choom.dongmued,

the default bardrate settings is 115200/8n1,
please have a try to stop and disable the nvgetty service; this starts a console on ttyTHS1.

systemctl stop nvgetty
systemctl disable nvgetty

please also check similar discussion thread, Topic 82037, and Topic 74423 for reference.

thank JerryChang, for answer.

that service was disabled

more information…

I tested with the same method on jetson tx2 dev board, it works as well.

I have verified my device tree is correct by checking detail in “/sys/kernel/debug/pinctrl/700008d4.pinmux/pinconf-groups”,
it show pin uart2_cts, uart2_rts is function to “uartb”.

Finally, the problem is not “can’t use /dev/ttyTHS1” but the problem is I can’t use UART Flow control on the /dev/ttyTHS1.

Thank you in advance.


according to UART_CTS# - #3 by Trumany, please leave CTS/RTS unconnected and keep the default status as Jetson carrier board.


I need Uart RTS signal to control RS 485 direction.

The timing diagrame of signal maybe like the pic

But now the RTS signal is not drive from jetson module, it drive only tx signal.


hello choom.dongmued,

we had test item for confirmation, the software function of basic RS485 TX/RX should works well
may I know what’s actual protocol you’re configured, is it a duplex UART or half duplex UART.


Can you share how you test method, script or some source code to me?



hello choom.dongmued,

it seems RTS signal did not pulling down.
could you please try below to force the pin as low state.
for example,

--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -56,6 +56,7 @@
 #define TEGRA_UART_IER_EORD                    0x20
 #define TEGRA_UART_MCR_RTS_EN                  0x40
 #define TEGRA_UART_MCR_CTS_EN                  0x20
+#define TEGRA_UART_MCR_FORCE_RTS_LOW           0x02
 #define TEGRA_UART_LSR_ANY                     (UART_LSR_OE | UART_LSR_BI | \
                                                UART_LSR_PE | UART_LSR_FE)
 #define TEGRA_UART_IRDA_CSR                    0x08
@@ -1545,6 +1545,8 @@ static void tegra_uart_set_termios(struct uart_port *u,
                tty_termios_encode_baud_rate(termios, baud, baud);
        spin_lock_irqsave(&u->lock, flags);

+       tup->mcr_shadow &= ~TEGRA_UART_MCR_FORCE_RTS_LOW;

        /* Flow control */
        if (termios->c_cflag & CRTSCTS) {
                tup->mcr_shadow |= TEGRA_UART_MCR_CTS_EN;
@@ -1896,6 +1898,11 @@ static int tegra_uart_probe(struct platform_device *pdev)
                return ret;

+       clk_prepare_enable(tup->uart_clk);
+       tup->mcr_shadow = TEGRA_UART_MCR_FORCE_RTS_LOW;
+       tegra_uart_write(tup, tup->mcr_shadow, UART_MCR);
+       clk_disable_unprepare(tup->uart_clk);
        if (tup->enable_rx_buffer_throttle) {
                setup_timer(&tup->timer, tegra_uart_rx_buffer_throttle_timer,