UART ttyTHS1 not working as expected on A206 carrier board

hello chennakeshavareddy.palla,

this A206 should be a customer carrier board, right?
it may not using ttyTHS1, please looking for registered software nodes for the mappings of serial ports, i.e. $ dmesg | grep THS

It is showing the THS1 & THS2 are available

jetsongpu@ubuntu:~$ dmesg | grep THS
[ 1.593949] 70006040.serial: ttyTHS1 at MMIO 0x70006040 (irq = 64, base_baud = 0) is a TEGRA_UART
[ 1.594413] 70006200.serial: ttyTHS2 at MMIO 0x70006200 (irq = 65, base_baud = 0) is a TEGRA_UART

If the A206 does not support THS1, please suggest the carrier board which has THS1 working.

A206 is by seed studio

hello chennakeshavareddy.palla,

there’re three UARTs available on Jetson Nano,
you may see-also Jetson Nano Product Design Guide and please check [Figure 11-5. Jetson Nano UART Connections]. it’s DevKit that by default using pin-203/205 as serial console.

We also intended to use this UART routed to 40-pin header, specifically seeing issue with Tx.

looks like we have same issue as reported, but no conclusion found.

hello chennakeshavareddy.palla,

it’s by default having debug console with pin-203/205, could you please check you’re able to setup a terminal and fetch the logs via serial port utility? such as picocom or minicom.
furthermore, you may try have below steps to remove UART2 debug messages on Jetson-Nano,

  1. Remove “earlyprintk=uart8250-32bit,0x70006000” from kernel cmdline
  2. Change ODMDATA to 0x14000
  3. Remove console=ttyS0 in kernel cmdline.

Jetson nano has 3 UARTS, out of these one as standard DEBUG port (UART0/ttyS0/ttySG0), out of the remaining two UART1 routed to 40-pin header (pins 8,10, tx/rx ttyTHS1), UART2 routed to Button header(ttyTHS2).

DEBUG UART is absolutely fine, do not want to disturb it. We wanted to use UART1.

hello chennakeshavareddy.palla,

this is by default for serial port output logs, please follow above to disable that for normal usage.

On A206 carrier board, there is a dedicated micro-USB connector to provide DEBUG (UART0/ttyS0/ttySG0).

[ 1.583166] 70006000.serial: ttyS0 at MMIO 0x70006000 (irq = 63, base_baud = 25500000) is a Tegra
[ 1.594523] 70006040.serial: ttyTHS1 at MMIO 0x70006040 (irq = 64, base_baud = 0) is a TEGRA_UART
[ 1.594939] 70006200.serial: ttyTHS2 at MMIO 0x70006200 (irq = 65, base_baud = 0) is a TEGRA_UART

We want to use ttyTHS1 (0x70006040).

please see-also M.2 Uart (UART0) issues on XavierNX (custom carrier board), it sometimes be an issue with the setup of minicom, please modify the settings for customer board.

I just checked with cutecom, no success.

hello chennakeshavareddy.palla,

it’s uart-b, i.e. uartb: serial@70006040 {
please also check device tree sources, do you have Tx/Rx definition as following,

                        uart2_tx_pg0 {
                                nvidia,pins = "uart2_tx_pg0";
                                nvidia,function = "uartb";
                        uart2_rx_pg1 {
                                nvidia,pins = "uart2_rx_pg1";
                                nvidia,function = "uartb";

since it’s customize board, you may also contact with board vendor for details.

We are using release image, not sure how to check the device tree sources. But the dt path exists and status is okay.

cat /proc/device-tree/serial@70006040/status

hello chennakeshavareddy.palla,

could you please try to stop and disable nvgetty service.
for example.
$ systemctl stop nvgetty
$ systemctl disable nvgetty

yes, I did this step and disabled nvgetty service. No luck.

hello chennakeshavareddy.palla,

it’s customize carrier board, please contact with vendor for further supports.
BTW, with the steps as mentioned in comment #10, ttyTHS1 can be access as normal UART port on DevKit

I have raised same issue on seeedstudio forum as well, but haven’t got any updates.

Thanks for your help.

1 Like

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.