Currently,our developed board connect TX2 UARTC to external rs422 chipset,without connected hardware flow control signal.
Our application configure ttyTHS2 as B115200,N,no parity,1 bit stop,disable hardware flow control,disable software flow control and communicate with external host cpu by rs422.
Our application contain a send thread almost send 30byte per 16ms,and anther thread receive date by ttyTHS2. Sometimes send thread will be blocked at linux “write()” system API,but receive thread is normal. In hardware,when we disconnect RX+, RX- signal in RS422 chipset,means just ttyTHS2 uart TX signal connect to host cpu by RS422, send thread never appear block situation again. That’s so strange. Why does receive channel influence send channel?