Sorry, I misunderstand the naming rule, let me correct that.
UART0 => /dev/ttyTHS1 => serial@3110000
UART1 => /dev/ttyTHS0 => serial@3100000
But I struggle at the flow control test
we using picocom-f h to enable hardware flow control. /dev/ttyTHS1 ↔ /dev/ttyTHS0 ===> pass /dev/ttyUSB0 ↔ /dev/ttyTHS0 ===> pass /dev/ttyUSB0 ↔ /dev/ttyTHS1 ===> pass
All port can transmit/ receive data as normal.
But we don’t think picocom can test flow control function.
So we use another test tool linux-serial-test has problem.
(This tool send ASCII to another port, check is the input port’s pattern is correct or not.
If flow control is on, you can set delay( -l) to cause buffer to fill up and start using flow control)
we also use picocom to see what’s the result of data.
Flow control
UART1 (/dev/ttyTHS0) TX
UART0 (/dev/ttyTHS1) TX
USB tty (/dev/ttyUSB0) TX
UART1 (/dev/ttyTHS0) RX
-
some of the byte is wrong
pass
UART0 (/dev/ttyTHS1) RX
some of the byte is wrong
-
pass
USB tty (/dev/ttyUSB0) RX
completely wrong
completely wrong
-
I wonder if the patch mentioned before (force RTS remain low) cause this issue?
We had verified this test tool on x86 PC, i.MX8M series.
We consider this is the issue targets to Nvidia serial driver( serial-tegra.c).
If you don’t trust this flow control test tool, please tell us which tool should use for.
@KevinFFF can a patch to fix UART be made available for JP 5.1.1? We have two customers with a total of 23 systems that were expecting to use RS-485 half duplex via ttyTHS0 and now we find that the UART is not fit for purpose. We would have to recall the units and JP6 is still not even available yet. Forcing us to make this Jetpack update right now will also have knock-on effects on other development work we have ongoing.
I’m not clear about if you are using the devkit or other custom carrier board.
What’s the customization in your UART design?
Could you verify UART loopback test w/o enabling HW flow control?
Which UART interface would you like to use?
Its a custom carrier board from Forecr (commented above). We also had the same issue with another custom carrier board.
We want to communicate back and forth via /dev/ttyTHS0
Currently it seems that we have to manually change the hardware configuration of the GPIO pins to be either send or receive. Want to just send RS485 serial messages to ttyTHS0 and for it to recognise if we are transmitting or receiving.
Updating to Jetpack5.X is still not great because we’ll need to recall systems and re flash them and also I’m guessing this jetpack is still not available?
Is there not a patch we can run to specifically fix this on Jetpack 5.1.1?
At the moment we would have to do the following:
Command for RS485’s direction in RX (receiving) mode:
echo 0 > /sys/class/gpio/PCC.00/value
Command for RS485’s direction in TX (sending) mode:
echo 1 > /sys/class/gpio/PCC.00/value
But we just want to send OR receive to ttyTHS0 without switching the mode.
When we use ttyUSB* serial convertors we can just send and receive serial commands with a software-defined minimal interval to avoid clashes. We want to do the same with ttyTHS0 and not worry about changing the hardware configuration of the pins.
I’m not sure if the UART related fix would help for your case.
Could you provide the detailed reproduce steps on the devkit so that I can verify it locally?
If you would just need one mode in your use case, could you just configure the default pin state for PCC.00 in pinmux spreadsheet?