UEFI ASSERT fail with PCIe link connected on custom baseboard, works with Xavier

[marc.andre]

I have now realized that also with the reduced BAR size, I am getting the same stability issues.
I am separating the topics. I have started a separate topics for the stablity issues / CBB errors:

CBB & BadTLP error when running DMA transfer with PCIe device (C5 port) - works fine on Xavier

I am porting Orin onto an existing design with Xavier AGX. The design connects via PCIe (C5 x8 gen3) to an FPGA on a custom baseboard. The FPGA uses DMA transfers (Intel DMA engine) to transfer data to and from the Jetson (using GPUdirect RDMA). The design work fine and stable on Xavier, but with Orin it crashes within the first 0 to 30s with BadTLP from PCIe and CBB errors. Any inputs are welcome. [ 57.157712] gxyfpga 0005:01:00.0: Starting mSGDMA(0) [ 57.157819] gxyfpga 0005:01:00.0:…

On this topics, I would appreciate if you could suggest or confirm the adjustment of the address translation to work with larger BARs (2GB).