Hi Kevin,
Yes I enable the C7x1 on the board but disable C9x1,
because we have a pcie lan chip on the board that connect to C9.
This is my post
I kown the C9 doesn’t work so comment it.
p3767.conf.common
ODMDATA="gbe-uphy-config-9,hsstp-lane-map-3,hsio-uphy-config-0";
cvb/tegra234-p3509-a02-pcie.dtsi
pcie@141e0000 { /* C7x1 node */
status = "okay";
phys = <&p2u_gbe_0>;
phy-names = "p2u-0";
};
//pcie@140c0000 { /* C9x1 */
/* status = "okay";
phys = <&p2u_gbe_1>;
phy-names = "p2u-0";
};*/