Unable to write to SPI slave device

Hi Sir/Madam

Problem Statement: Unable to write to SPI slave device. We are using SPI0 and modified tegra18_defconfig file, changed the dtb and modified pinmux file as it was told in forum. But still we are unable to write to SPI slave, though I’m able to detect the device file. Please help me in this regard.

Hardware and Kernel: TX2i SOM with custom carrier board. Kenel version is 4.4

Thanks in advance.

Have a reference to below topic.


Hi ShaneCCC

Thanks for the reply. I’ve followed the above forum link, and tried, but still I’m unable to write.


  1. Enabled SPI1 by adding spi@0 in the dts file and was able to get device file. Modified pinmux of SPI 1 : 0x0243d018, 0x0243d010 0x02430038 etc
  2. Just to try, followed the above steps but modified pinmux for SPI4 also 0x02430038,0x02430040 etc. But still unable to write
  3. Enabled all four SPI in dts, then on dmesg I’m getting
    “spi-tegra114 c260000.spi: chipselect 0 already in use”
    But only two device files are created: spidev0.0 and spidev3.0. So modified the pinmux for both of them, still fail.


  1. I have 3 dtsi files which I used them to get pinmux file. But, the dtb I’m using is default one. Do I need to convert all three dtsi files to dtb and flash? If yes, how to convert all 3 dtsi to one, as dtc compiler requires only one dtsi file
  2. If No, for above doubt then how shall I proceed?

Thanks in advance

Hi ShaneCCC

I studied a little further and got to know that SPI0 in schematics refers to SPI2(spi@c260000) in dtsi file. I need to enable this as we are using SPI0 in custom board. Can you tell me what to modify in the dts file and which pinmux registers need to modified? As I can see SPI0 is used for display in development/evaluation board so directly adding spi@0 section didn’t worked.I’m attaching our schematic and pinmux excel for reference.

Thanks in advance

Jetson-TX2i-Generic-Customer-Pinmux-Template.xlsx (614 KB)

You need to modify the Linux_for_Tegra/bootloader/t186ref/BCT/tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg
Below is SPI2 pinmux reg, You can have devmem2 to read it back to check. Have check the definition from the TRM, search for the “PADCTL_AO_GPIO_SEN”

pinmux.0x0c302050 = 0x00000400; # gpio_sen1_pv1: spi2, tristate-disable, input-disable, lpdr-disable
pinmux.0x0c302058 = 0x00000454; # gpio_sen2_pv2: spi2, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0c302060 = 0x00000400; # gpio_sen3_pv3: spi2, tristate-disable, input-disable, lpdr-disable
pinmux.0x0c302068 = 0x00000408; # gpio_sen4_pv4: spi2, pull-up, tristate-disable, input-disable, lpdr-disable