Understanding the cam_i2cmux dt representation and gpio

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin NX
,
1

Hi,
We use Orin NX on a custom carrier board and we write drivers for several ser/des pairs.
Currently we have a working fpd ser/des driver.

the dt nodes hierarchy is:

cam_i2cmux
{
i2c@0
{
fpd_des
{
…
};
};
};

My questions are:

  1. When executing i2cdetect we see 3 channels for the cam i2c mux: 10,9,11

$ i2cdetect -l
i2c-3 i2c 3190000.i2c I2C adapter
i2c-10 i2c i2c-2-mux (chan_id 0) I2C adapter
i2c-1 i2c c240000.i2c I2C adapter
i2c-8 i2c 31e0000.i2c I2C adapter
i2c-6 i2c 31c0000.i2c I2C adapter
i2c-4 i2c Tegra BPMP I2C adapter I2C adapter
i2c-11 i2c i2c-2-mux (chan_id 0) I2C adapter
i2c-2 i2c 3180000.i2c I2C adapter
i2c-0 i2c 3160000.i2c I2C adapter
i2c-9 i2c i2c-2-mux (chan_id 0) I2C adapter
i2c-7 i2c c250000.i2c I2C adapter
i2c-5 i2c 31b0000.i2c I2C adapter

If we probe each of them, they show the exact same content.
Why is that? what is the meaning of 9,10,11 and why they show the same content? are they the exact same bus with different names?

  1. The current FPD ser/des works but when I use I2Cdetect I see the FPD des on bus 9/10/11 (which is i2c_mux).
    So I figure that bus 9 is the representation of i2cmux. In that case, what is the meaning of child nodes i2c@0,i2c@1, etc… under cam_i2cmux node?

  2. As a followup to the previous question, I wish to add more ser/des pairs. They also shows up on bus 9 when probing with I2Cdetect. So the question now is if to put each des under different i2c@x child node or just put all of them under i2c@0 node?
    I saw in many examples they use separate child nodes: i2c@0 , i2c@1 etc but didn’t understand why.

  3. How I know which reset-gpios to use for the new ser/des pairs? for example, the current fpd link ser/des pair uses the following:
    reset-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;

Thanks

3

Hello @bsp_dev,

Those are great questions.

Please allow us to give you a bit of insight.

  1. You are correct. Bus 9, 10 and 11 are the same bus. In fact, the bus 9 is being multiplexed into buses 10 amd 11.
  2. Correct. Bus 9 is the actual i2c bus dor the device. Then buses 10 and 11 are being multiplexed. Therefore, bus 8 is not the multiplexor, bur rathe the multiplexor outut is connected to bus 9. And buses 10 and 11 are the multiplexor inputs.
  3. If you wish yo have multilple serdes pairs using the same bus and i2c address you need to add separate nodes for them and have them be multiplexed.
  4. That will depend on your HW. You should have different gpios connected to the different mipi ports. That should be listed on the carrier board schematics.

Please let us know if you have more questions.

Regards,
Andrew

1 Like
4

Check below for the i2c mux gpio.
Suppose ONX only have enhance bus 9 and 10 due to only one GPIO pin design.

https://www.kernel.org/doc/Documentation/i2c/muxes/i2c-mux-gpio

1 Like
6

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