Unified cache size in P100

I am wondering if anybody knows the exact size of the Unified Cache Size for the P100. My experimentation shows that it should be around 10KB, but I cannot find any documentation that gives the exact figure.

Regards
Daniel

I would guess the size is ~18KB (per SM) based on this:

https://devblogs.nvidia.com/inside-volta/

“The combined capacity is 128 KB/SM, more than 7 times larger than the GP100 data cache,”

The table 3.1 in this paper:

https://arxiv.org/pdf/1804.06826.pdf

seems to be suggesting a 24KB L1 cache size.

I don’t know of documentation that gives the exact figure.

This thread may be of interest, but does not address the size question:

https://devtalk.nvidia.com/default/topic/1006066/cuda-programming-and-performance/pascal-l1-cache/