i got a question that i used to attached my device with USB0, which will be BUS 03 when i use r24.2.1 bsp.
then i try the new stuff, r28.1. they changed to be BUS 01, that is crowdy since i already put many device under BUS 01.
Can someone give me a hand to modify related settings( maybe dts, i’m not sure which part i should change)? Many thanks!!
I’m not sure what you are asking, but could you post the output from “lsusb -t” and then suggest where this is arranged badly for you? FYI, order of enumeration is part of the USB devices and standards in such a way that you won’t be able to change some of it directly with software.
Hi linuxdev!
here is “lsusb -t” for r24.2.1
ubuntu@tegra-ubuntu:~$ lsusb -t
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=tegra-ehci/1p, 480M
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=tegra-xhci/4p, 5000M
|__ Port 1: Dev 2, If 0, Class=Vendor Specific Class, Driver=r8152, 5000M
|__ Port 2: Dev 3, If 0, Class=Hub, Driver=hub/2p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=tegra-xhci/5p, 480M
|__ Port 3: Dev 3, If 0, Class=Hub, Driver=hub/2p, 480M
“Bus 03.Port 1: Dev 2” <- my usb hub, it will attach some devices. i connect it to {USB0} for decreasing other USB loading.
then, here is “lsusb -t” for r28.1
nvidia@tegra-ubuntu:~$ lsusb -t
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/4p, 5000M
|__ Port 1: Dev 2, If 0, Class=Vendor Specific Class, Driver=r8152, 5000M
|__ Port 2: Dev 3, If 0, Class=Hub, Driver=hub/2p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/5p, 480M
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
|__ Port 3: Dev 3, If 0, Class=Hub, Driver=hub/2p, 480M
“Bus 01.Port 1: Dev 2” <- it didn’t put in new bus
so far i know about r28.1 is that EHCI’s work has been removed, new xHCI works differs. But i’m still trying to put my usb hub in another bus.
i think i should modify tegra210-jetson-cv-base-p2597-2180-a00.dts. it’s part of my dts.
Any advice will be greatly appreciated!!
pinctrl@7009f000 {
status = "okay";
pinctrl-0 = <&tegra_padctl_uphy_pinmux_default>;
pinctrl-names = "default";
tegra_padctl_uphy_pinmux_default: pinmux {
usb2-micro-AB-xusb {
nvidia,lanes = "otg-0";
nvidia,function = "xusb";
nvidia,port-cap =
<TEGRA_PADCTL_PORT_OTG_CAP>;
nvidia,usb3-port-fake = <2>;
};
usb2-std-A-port0 {
nvidia,lanes = "otg-2";
nvidia,function = "xusb";
nvidia,port-cap =
<TEGRA_PADCTL_PORT_HOST_ONLY>;
};
usb2-std-A-port1 {
nvidia,lanes = "otg-3";
nvidia,function = "xusb";
nvidia,port-cap =
<TEGRA_PADCTL_PORT_HOST_ONLY>;
};
usb3-std-A-port0 {
nvidia,lanes = "uphy-lane-5";
nvidia,function = "usb3";
nvidia,usb3-port = <1>;
nvidia,usb2-map = <2>;
nvidia,port-cap =
<TEGRA_PADCTL_PORT_HOST_ONLY>;
};
usb2-eth {
nvidia,lanes = "otg-1";
nvidia,function = "xusb";
nvidia,port-cap =
<TEGRA_PADCTL_PORT_HOST_ONLY>;
};
usb3-eth {
nvidia,lanes = "uphy-lane-6";
nvidia,function = "usb3";
nvidia,usb3-port = <0>;
nvidia,usb2-map = <1>;
nvidia,port-cap =
<TEGRA_PADCTL_PORT_HOST_ONLY>;
};
hsic {
nvidia,lanes = "hsic-0";
nvidia,function = "hsic";
};
pcie {
nvidia,lanes = "uphy-lane-1", "uphy-lane-2",
"uphy-lane-3", "uphy-lane-4";
nvidia,function = "pcie";
nvidia,pcie-controller = <0>;
nvidia,pcie-lane-select =
<TEGRA_PADCTL_PCIE_LANE_X4>;
};
pcie-m2 {
nvidia,lanes = "uphy-lane-0";
nvidia,function = "pcie";
nvidia,pcie-controller = <1>;
nvidia,pcie-lane-select =
<TEGRA_PADCTL_PCIE_LANE_X1>;
};
sata {
nvidia,lanes = "uphy-lane-7";
nvidia,function = "sata";
};
};
};
xusb@70090000 {
status = "okay";
extcon-cables = <&vbus_gpio_extcon 1>;
extcon-cable-names = "id";
#extcon-cells = <1>;
phys = <&tegra_padctl_uphy TEGRA_PADCTL_UPHY_UTMI_P(3)>,
<&tegra_padctl_uphy TEGRA_PADCTL_UPHY_UTMI_P(2)>,
<&tegra_padctl_uphy TEGRA_PADCTL_UPHY_USB3_P(1)>,
<&tegra_padctl_uphy TEGRA_PADCTL_UPHY_UTMI_P(1)>,
<&tegra_padctl_uphy TEGRA_PADCTL_UPHY_USB3_P(0)>,
<&tegra_padctl_uphy TEGRA_PADCTL_UPHY_UTMI_P(0)>;
phy-names = "utmi-3", "utmi-2", "usb3-1", "utmi-1", "usb3-0", "utmi-0";
nvidia,pmc-wakeup =
<&tegra_pmc
PMC_WAKE_TYPE_EVENT 41 PMC_TRIGGER_TYPE_HIGH>,
<&tegra_pmc
PMC_WAKE_TYPE_EVENT 44 PMC_TRIGGER_TYPE_HIGH>;
};
xudc@700d0000 {
nvidia,portmap = <0x0108>;
#extcon-cells = <1>;
status = "okay";
phys = <&tegra_padctl_uphy TEGRA_PADCTL_UPHY_UTMI_P(0)>;
phy-names = "usb2";
};
Can I verify this is the regular dev kit carrier board and not something custom? If so, which connector is this HUB physically connected to? I am surprised to see three “root” HUBs since these should only be HUBs integrated into the Jetson.
I will clone my current TX1 R28.1 and throw an old R24.2.1 clone on it and see what I can. FYI, R24.2.2 should be 100% compatible with your R24.2.1. If I recall correctly there was a bluetooth vulnerability (or something related to it?) discovered for anything bluetooth around that time and R24.2.2 was issued for this reason (there were probably other bug fixes, I’m not sure). If you can’t use R28.1 (newer 4.x kernel) instead of R24.2.1 (older 3.x kernel) you might still consider R24.2.2.
Hi linuxdev!
Actually this is NOT regular carrier board. my usb hub connected to JTX1 B39/B40 , thus i can plug more device here instead of type A connector.
Thanks for R24.2.2 info!! i’ll check this out right away.
I am unsure of how to answer for custom hardware. What it comes down to is that if you have three root_hubs showing up, then you have three controllers with drivers loaded. When you lose a controller in lsusb it implies the driver for that root_hub is not loaded.
What complicates this is that a given port might have one controller for USB3, and a different controller for USB2 or slower devices. In this case a single port can route to two different controllers, but with only one of the two being active at any moment (the one used depends on what is plugged in at that moment…the unused one will not show up with lsusb). It is also possible to have three ports with three controllers where a USB3 controller has no USB2 controller compatibility mode (in which case all will show up at all times). I cannot answer, but whoever does answer will probably want to know what modes you expect to be available on particular physically present ports.