USB2 Type-C OTG port and I2C problems

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
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1

Hi,

In our carrier board,

  1. we removed USB3 capability from the OTG connector but kept it as Type-C connector without PD controller.
    The rough schematics about this are below:
    vbus_id
    vbus_id984×621 42.1 KB

We can write the flash over this port, but
the problem is the host mode is not working.

  1. We also removed DP capability from displays and are using both head0 and head2 (as HDMI2 and HDMI1) currently. We have the screens, but some I2C busses are not working, including display related ones.

The config files modified are below:
tegra194-p2822-disp.dtsi (2.9 KB)
tegra194-p2888-0001-p2822-0000-common.dtsi (8.4 KB)
tegra194-plugin-manager-p2888-0000.dtsi (1.5 KB)

How can I change those DTSI files to reflect the HW changes in the carrier?

Best,

3

Please share full dmesg and schematic.

It is not easy to read from your picture.

4

We noticed that if we plug a TypeC-to-TypeA adapter cable during the boot we can plug later a USB2 stick multiple times and as long as the adapter cable plugged in we can remove and insert the USB2 device multiple times. The device works on each time.

But if the adapter cable (with/without the device) is not plugged in before booting, the port doesn’t work in the host mode anymore.

By plugging in an OTG cable, any time the NVIDIA device is visible from the host PC.

The dmesg output and the related schematics are below:

boot.txt (42.4 KB)
dmesg.txt (204.2 KB)

vbus_id_sch
vbus_id_sch5112×1199 252 KB

5

Please dump the dmesg right after the boot is done. The log you shared is not complete.

Also, your system looks like has lots of unrelated error.

Are you really using our jetpack release on your board?

7

Hi, there are design examples in Xavier product design guide, have you followed that to make the custom design? The figure of Jetson AGX Xavier Carrier Board Design USB Type C
Connection Example can be for your reference. At least the switch and the UPHY and TX/RX connection should follow that well.

https://developer.nvidia.com/embedded/dlc/jetson-agx-xavier-series-oem-product-design-guide

9

Hi WayneWWW,

The log was too long because of open debug configs in tegra_defconfig. The errors were also because of the flags, it seems. I removed them (the default status).

The last dmesg log is here:
dmesg.log (70.3 KB)

Best,

10

Please check @Trumany 's comment and document. We only support type C for such design.

11

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