We have a custom carrier board with 2 usb-c ports. The dtsi file has been modified to reflect the hardware changes and to enable to second usb-c port.
But below is the screenshot of the dmesg logs and its missing the disconnect for usb2-1 when i unplug the usbc device.
/*
* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#include <dt-bindings/gpio/tegra234-gpio.h>
#include "dt-bindings/input/input.h"
#include "tegra234-p3768-0000-a0-pwm-fan.dtsi"
#include "tegra234-p3768-0000-a0-pcie.dtsi"
#include "tegra234-p3768-0000-a0-fixed-regulator.dtsi"
#include "tegra234-p3768-audio.dtsi"
#include "tegra234-p3768-camera-rbpcv3-imx477.dtsi"
#include "tegra234-p3768-camera-rbpcv2-imx219.dtsi"
/ {
gpio-keys {
compatible = "gpio-keys";
gpio-keys,name = "gpio-keys";
status = "okay";
forcerecovery {
label = "force-recovery";
gpios = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
};
power_key {
label = "power-key";
gpios = <&tegra_aon_gpio TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
};
};
eeprom-manager {
data-size = <0x100>;
bus@0 {
i2c-bus = <&gen1_i2c>;
eeprom@1 {
slave-address = <0x57>;
label = "cvb";
};
};
bus@1 {
i2c-bus = <&gen2_i2c>;
eeprom@1 {
slave-address = <0x50>;
label = "super-module";
};
};
};
xusb_padctl: xusb_padctl@3520000 {
status = "okay";
pads {
usb2 {
lanes {
usb2-0 {
nvidia,function = "xusb";
status = "okay";
};
usb2-1 {
nvidia,function = "xusb";
status = "okay";
};
usb2-2 {
nvidia,function = "xusb";
status = "okay";
};
};
};
usb3 {
lanes {
usb3-0 {
nvidia,function = "xusb";
status = "okay";
};
usb3-1 {
nvidia,function = "xusb";
status = "okay";
};
usb3-2 {/* ERIC T 11/13/23 Added to enable third lane of USB3 used on our carrier board*/
nvidia,function = "xusb";
status = "okay";
};
};
};
};
ports {
usb2-0 {/* Goes to recovery port J13*/
mode = "otg";
status = "okay";
vbus-supply = <&p3768_vdd_5v_sys>;
usb-role-switch;
port {
typec_p0: endpoint {
remote-endpoint = <&fusb_p0>;
};
};
};
usb2-1 {/* Goes to J12 */
mode = "host";
status = "okay";
vbus-supply = <&p3768_vdd_5v_sys>;
port {
typec_p1: endpoint {
remote-endpoint = <&fusb_p1>;
};
};
};
usb2-2 {/* Goes to J5/J6 */
mode = "host";
vbus-supply = <&p3768_vdd_5v_sys>;
status = "okay";
};
usb3-0 {/* Goes to J13 */
nvidia,usb2-companion = <0>; /*ERIC T 2/26/24 Swapped from 1 --> 0 to support VGW */
status = "okay";
};
usb3-1 {/* Goes to J12 */
nvidia,usb2-companion = <1>; /*ERIC T 2/26/24 Swapped from 0 --> 1 to support VGW */
status = "okay";
};
usb3-2 {/* Goes to J5/J6 */
/* ERIC T 11/13/23 Added to enable third lane of USB3 used on our carrier board*/
nvidia,usb2-companion = <2>;
status = "okay";
};
};
};
tegra_xudc: xudc@3550000 {
status = "okay";
phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}>;
phy-names = "usb2-0", "usb3-1";
nvidia,xusb-padctl = <&xusb_padctl>;
};
tegra_xhci: xhci@3610000 {
status = "okay";
phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-0}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-2}>;/* ERIC T 11/13/23 Added to enable third lane of USB3 used on our carrier board*/
phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1", "usb3-2";/* ERIC T 11/13/23 Added to enable third lane of USB3 used on our carrier board*/
nvidia,xusb-padctl = <&xusb_padctl>;
};
i2c@c240000{
status = "okay";
fusb301@25 {
compatible = "onsemi,fusb301";
reg = <0x25>;
status = "okay";
interrupt-parent = <&tegra_main_gpio>;
interrupts = <TEGRA234_MAIN_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
connector@0 {
port@0 {
fusb_p0: endpoint {
remote-endpoint = <&typec_p0>;
};
};
};
};
};
i2c@c250000{
status = "okay";
fusb301@25 {
compatible = "onsemi,fusb301";
reg = <0x25>;
status = "okay";
interrupt-parent = <&tegra_main_gpio>;
interrupts = <TEGRA234_MAIN_GPIO(H, 0) IRQ_TYPE_LEVEL_LOW>;
connector@0 {
port@0 {
fusb_p1: endpoint {
remote-endpoint = <&typec_p1>;
};
};
};
};
};
spi@3210000{ /* SPI1 in 40 pin conn */
status = "okay";
spi@0 { /* chip select 0 */
compatible = "tegra-spidev";
reg = <0x0>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
spi@1 { /* chip select 1 */
compatible = "tegra-spidev";
reg = <0x1>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
};
spi@3230000{ /* SPI3 in 40 pin conn */
status = "okay";
spi@0 { /* chip select 0 */
compatible = "tegra-spidev";
reg = <0x0>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
spi@1 { /* chips select 1 */
compatible = "tegra-spidev";
reg = <0x1>;
spi-max-frequency = <50000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
};
serial@3100000 {/* UARTA, for 40 pin header */
status = "okay";
};
mttcan@c310000 {
status = "okay";
};
serial@3140000 {
/* UARTE, Goes to M2.E and also some of the pins to bootstrap */
status = "okay";
};
serial@31d0000 {/* UARTI - SBSA */
status = "okay";
};
tachometer@39c0000 {
status = "okay";
upper-threshold = <0xfffff>;
lower-threshold = <0x0>;
};
pwm@3280000 {/* PWM1 40pin header, pin 15 */
status = "okay";
};
pwm@32a0000 {/* PWM3 - FAN */
status = "okay";
};
pwm@c340000 { /* PWM4 - OVR */
status = "disabled";
};
pwm@32c0000 {/* PWM5 40 pin header, pin 33 */
status = "okay";
};
pwm@32d0000 {/* PWM6 OVR */
status = "disabled";
};
pwm@32e0000 {/* PWM7 - 40pin header, pin 32 */
status = "okay";
};
bluedroid_pm {
status = "disabled";
};
display@13800000 {
status = "okay";
};
tegra-capture-vi {
ports {
port@0 {
endpoint {
port-index = <1>;
};
};
};
};
host1x@13e00000 {
nvcsi@15a00000 {
channel@0 {
ports {
port@0 {
endpoint@0 {
port-index = <1>;
};
};
};
};
};
};
cam_i2cmux{
i2c@0 {
rbpcv2_imx219_a@10 {
mode0 {
tegra_sinterface = "serial_b";
lane_polarity = "6";
};
mode1 {
tegra_sinterface = "serial_b";
lane_polarity = "6";
};
mode2 {
tegra_sinterface = "serial_b";
lane_polarity = "6";
};
mode3 {
tegra_sinterface = "serial_b";
lane_polarity = "6";
};
mode4 {
tegra_sinterface = "serial_b";
lane_polarity = "6";
};
ports {
port@0 {
endpoint {
port-index = <1>;
};
};
};
};
rbpcv3_imx477_a@1a {
mode0 {
tegra_sinterface = "serial_b";
lane_polarity = "6";
};
mode1 {
tegra_sinterface = "serial_b";
lane_polarity = "6";
};
ports {
port@0 {
endpoint {
port-index = <1>;
};
};
};
};
};
};
};