USBSS ESD Parameters

What is Vrwm (reverse stand-off), Rdyn (dynamic resistance) of the ESD protection integrated in Xavier SoM?
Or maybe you can tell what is the Vih_max (High level input voltage maximum) for the USBSS RX and TX lines? This information only provided for CMOS and OD logic, but not provided for USBSS PHY

Hi, do you meet any issue on this? Can you describe in detail? We don’t meet such question before.

I need this info for precise calculation of the ESD protection. We’re designing a custom carrier board for Xavier NX.

No such info of module is public. For ESD protection, it needs customer to make ESD design on specific interface ports on carrier board. The devkit design can give some help on this too.

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