Use FPGA for generating power on sequence

Hello. I develop custom board with AGX Orin. I planning use FPGA for communiocation betwen Jetson trought PCIe interface. I also plan to implement power on logic using FPGA. Therefore, the FPGA on my board will turn on first, and turn on the Jetson module.
In design guide there is a requirement that the carrier board be powered after the module.

Is there any solution to safely turn on the carrier board before the module?
Say, isolation of control signals, what about the PCIe and other interface?

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I could use a MCU to control the power up so it doesn’t violate the requirements.
But I found a lot of posts that talk about the problems that occur when you turn on the FPGA after turning on the Jetson, since the FPGA is programmed for a long time.

Hi, the carrier power rails that supply shared interface b/w module and carrier should be turn on after module power rails, so that the module pin status won’t be affected during power on.

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