Use Jetson Xavier native spi to extend one can interface, occur error “TX underflow”

Use Jetson Xavier native spi to extend one can interface.The extension chip is used mcp2517fd spi to can controller of microchip, when the application sends can frame, the drivers occurs error “TX underflow”and terminates data transmission.Receiving data is ok.So why is that?

Tx Underflow error occurs when data is not written fast enough compared to data sent out on spi-bus. We need more info to understand this issue.

• If you are using pio mode, need to ensure fifo is filled before start of transfer and transfer length is less than total fifo words filled.
• If you are using dma, need to check dma burst size and match it with tx fifo trigger level. Driver already takes care of this and if there were modifications to driver, you have to correct it.
• If you are still seeing failures in dma, may need to check at register dump and understand what exact SPI transaction. Like what is the transfer length, is it full duplex or half duplex, bits per word used etc.
• One other issue could be dma too busy handling other dma clients, or cpu too busy in case of pio mode transfers.

SPI has two mode including pio mode and dma mode.I check that the SPI Controller is currently in PIO mode.How can I enable
the dma mode?

Dma mode will be set if transfer size is more than 64 words in unpacked mode and 256 bytes in packed mode (8, 16, 32).