Set up the Jetson Xavier as a slave, I saw on other forums I would need to modify the device tree file, but I do not have access to it.
display the 16bit data I am sending from the master (FPGA) on the Jetson Xavier AGX board terminal
I have tested a simple python code for the Jetson loopback test, however, I am not getting a clock produced from the board as well as while checking using the oscilloscope.
Thanks for the link, I have updated the device tree to have SPI@3210000 set as slave, However How can I receive the data from the FPGA, I tried a python code using spidev library but I keep getting errors.
import spidev
import time
spi = spidev.SpiDev(0, 1)
spi.max_speed_hz = 7000000
spi.bits_per_word = 16
spi.mode = 0
try:
while True:
a = spi.readbytes(16)
time.sleep(0.1)
print(a)
finally:
spi.close()