V4L2 Driver Timeout Issues with Xilinx FPGA and Orin Nano DevKit

Hello JerryChang,

As you mentioned, setting csi_pixel_bit_depth to 8 results in the pixel_t value in the extract_pixel_format function becoming rgb_rgb8888, which leads to failure. However, it seems like there is indeed an issue occurring in the pixel conversion part. While searching through the related code, I found something unusual in the vi5_formats.h file.

115: TEGRA_VIDEO_FORMAT(RGB888, 24, RGB888_1X24, 4, 1, T_A8B8G8R8,
116:             RGB888, RGBA32, "RGBA-8-8-8-8"),

I modified T_A8B8G8R8 to T_R8G8B8A8 and attempted streaming again. After that, the content of the trace log changed compared to before.

Upon searching for the trace content, I found it similar to the post below:

I would appreciate your advice on the current situation. I have also attached the trace log. trace.1721455292.069.log (943.3 KB)