在使用Jetson Xavier NX核心板的时候发现在VDD_IN(5V)和POWER_EN信号之间延迟超过20ms会导致系统无法正常开机，从参考手册里边看到是要求最小400ms，这是什么原因导致的？如何解决？
备注：软件版本jetpack4.6.1
PN：900-83668-0030-000
Hi sylmq129,
A delay of only 20ms from VDD_IN to POWER_EN going high (active) is not supported. As stated under the POWER_EN description of section 5.1 of the Jetson Xavier NX Design Guide: A minimum delay of 400 ms is required between VDD_IN valid to POWER_EN active.
经过我们的测试，只要大于20ms的延迟就无法开机，且控制台无输出任何信息；我们测试的延迟用例0-20ms、25ms、80ms、200ms、400ms、1000ms、2000ms、8000ms；但仅在0-20ms内可以正常开机
HI sylmq129,
Please provide waveforms showing the power on sequence of the signals below for both a good case (0-20ms) and a failing case:
- VDD_IN
- SHUTDOWN_REQ*
- POWER_EN
- SYS_RESET*
I suppose this is your mapping:
C1/C2 = VDD_IN and SHUTDOWN_REQ
C3 = POWER_EN
C4 = SYS_RESET
One interesting difference is the delay from POWER_EN to SYS_RESET being >40ms in the 10ms/good case and <20ms in the 500ms/bad case. Can you please use cursors to measure the time between POWER_EN and SYS_RESET for the 500ms case to get a more accurate timing?
For the 500ms case, if you manually assert SYS_RESET after it fails to boot, does the manual reset allow booting?
C1：VDD_IN
C2：SHUTDOWN_REQ
C3：POWER_EN
C4：SYS_RESET
异常情况下POWER_EN和SYS_RESET之间的延迟大约13ms
另：与SYS_RESET引脚相连的MCU设置为输入态
在500ms启动失败的情况下，手动复位（assert SYS_REET）后，整个系统可以正常启动。
附加信息：
在500ms延迟情况下，如果去掉连接的MIPI-CSI镜头，系统可以正常启动；似乎和外接的MIPI-CSI镜头有关联。
Could you check if the MIPI-CSI device is providing any power that may reach the Jetson Xavier in some way, like through a signal that is driven high by the CSI side or a signal that is pulled up to some voltage? That may be backfeeding power that somehow prevents the boot from continuing/completing.