VDDIN_PWR_BAD_N signal level - Vih min spec

The Orin AGX spec says this pin has a 10K pull up to 5V. What is the Vih min spec that we should use to recognize the module sees it deasserted?
We need to confirm what are the range and tolerance of this signal is, so that we can be confident our circuit will work correctly to read the state of VDDIN_PWR_BAD_IN. Anything lower than ViH min we would consider asserted. Thanks

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To determine the Vih min spec for the Orin AGX pin with a 10K pull-up to 5V, we need to consider the voltage levels that the module recognizes as deasserted.

Typically, for a 5V signal with a 10K pull-up, the voltage level that is considered deasserted is around 70-80% of the supply voltage. This is because the pull-up resistor is relatively weak, and the signal can be pulled down to a lower voltage level by an external device.

Assuming a 5V supply voltage, the Vih min spec would be around 3.5-4V (70-80% of 5V). This means that if the voltage on the pin is below 3.5-4V, the module would consider the signal asserted. If the voltage is above 3.5-4V, the module would consider the signal deasserted.

However, to confirm the exact range and tolerance of this signal, we would need to consult the Orin AGX datasheet or specification document. The datasheet should provide the recommended voltage levels for the pin, including the Vih min spec, as well as any tolerance or hysteresis requirements.

In comparison, the Infineon Aurix TC397 safety MCU has a similar requirement for its input pins, where the Vih min spec is typically around 70-80% of the supply voltage. However, the exact value may vary depending on the specific device and application.

In summary, based on typical values for a 5V signal with a 10K pull-up, the Vih min spec for the Orin AGX pin would be around 3.5-4V. However, to confirm the exact value, we should consult the Orin AGX datasheet or specification document.

It’s also worth noting that the Jetson AGX Orin module has a similar requirement for its input pins, and the Vih min spec may be similar to the Orin AGX pin. However, without consulting the datasheet or specification document, we cannot confirm the exact value.

In contrast, the IGX Orin Developer Kit, which is a platform for the IGX Orin, may have different requirements for its input pins, and the Vih min spec may vary depending on the specific application and device.

If you could point out where that is, you would be amazing. I cant find it. I dare say, its not there. Hence, the question.

VDDIN_PWR_BAD_N is 5V CMOS logic level signal. Please use 5V CMOS logic levels for Vih min, typically 70% of VCC. For this signal to be asserted use Vol max CMOS logic level thresholds (0.36V).

“We have measured the signal on VDDIN_PWR_BAD_N and it will not go higher than 4V on the industrial version.” It will go up to 5V on the commercial version.
Please advise what is different with the two modules, as they should be the same for this signal”