I connected the phy chip through the RGMII interface of the Orin module on the custom carrier board, and the ENET_RST_N(H5) pin of the Orin module was connected to the reset pin of the phy chip.
We have RGMII working with AGX Orin and L4T 35.3.1
/* EQOS */
ethernet@2310000 {
status = "okay";
nvidia,mac-addr-idx = <0>;
nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G, 5) 0>;
phy-mode = "rgmii-id";
phy-handle = <&phy>;
/delete-node/ fixed-link;
mdio {
compatible = "nvidia,eqos-mdio";
#address-cells = <1>;
#size-cells = <0>;
phy: phy@0 {
reg = <0>;
nvidia,phy-rst-pdelay-msec = <224>; /* msec */
nvidia,phy-rst-duration-usec = <10000>; /* usec */
interrupt-parent = <&tegra_main_gpio>;
interrupts = <TEGRA234_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
};
};
};
However, when the Wake On LAN function is enabled, I tap the keyboard to switch the system from hibernation state to wake state. When the system switches from hibernation state to wake state, I detect that the ENET_RST_N(H5) pin of the Orin module will appear a low level pulse for 1 second.
phy chip cann’t work. When the system switches from hibernation state to wake state, how can I make phy chip work normally?
sudo apt-get install ethtool
sudo ethtool -s eth0 wol g
sudo ethtool eth0
ip a