I see a lot of this instruction in SASS code. for example: LOP3.LUT R45, R42, R19, RZ, 0x3c, !PT It seems the R45 register is output and the others are input. How the output is calculated?

Another question, Because ALU is very busy(98% utilized), I want to move some operation from ALU to FMA. In my code, one heat point is: a = a + b + c each variable is an unsigned int. The compiler use IADD3 to calculate the sum which is executed in ALU. I want to use two IMAD instruction to ca…

I don’t know how to force the compiler to generate IMAD instead of IADD3. I guess you could try various ptxas optimization levels but that is just likely to crater your performance. Another possibility might be to pass the multiplier of 1 in such a way (e.g. via a register) that the compiler canno…

LOP3.LUT is an instruction that can compute any logical operation with three inputs, using a lookup table (LUT) to do so. The basic idea is similar to that of FPGAs using complex building blocks (CLBs), some of which can compute any logical operation of up to five inputs. The introduction of LOP3 w…

As for the quest to replace one IADD3 by two IMADs, the fact that ptxas transforms the latter into the former is a pretty good indication that this is not a performance win as hoped for. ptxas is not generally shy to use IMAD, which appears to be a high-throughput instruction in Ampere family GPUs. …

As Robert suggested, I moved calculation from ALU to FMU and increased performance a lot. In most cases, using two IMAD instructions to calculate sum of three integers is worse than using single IADD3 instruction, so the compiler always try to using single IADD3 instruction. However in my case, as …

Thanks njuffa, the explanation and emulate of LOP3 here is very clear. But these codes only explain what the first four operands do, I wonder what the fifth operand is used to control. I came across two fifth operands when I examined the result of the S32 divide assembly, here is my kernel: #includ…

I have not paid attention to this predicate usage before. Maybe it is specific to certain architectures? Also the way the disassembler seems to work it does not display default settings. I guess for LOP3 the default setting is PT, meaning the predicate only gets displayed in disassembly when it is !…

What does LOP3.LUT mean? How is it executed?

Accelerated Computing CUDA CUDA Programming and Performance

Robert_Crovella September 9, 2022, 1:21pm 2

Its SASS, so its not well documented. However you can get some insight by studying the corresponding PTX instruction. This may be of interest.

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What does LOP3.LUT mean? How is it executed?

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