I’ve been researching GPU page tables recently, primarily using devices with Ada (4090) and Ampere (3070ti) architectures. I have a few questions regarding this topic:
- According to the Pascal page table format (link here), there’s a privilege bit at bit 5 in the PTE. What exactly does this privilege bit signify? Does it indicate a distinction similar to user mode and OS kernel mode in CPUs? If so, could it mean that GPU firmware might run in either a user mode or a privileged mode (which we currently cannot access)? Or does this privilege bit refer specifically to GPU compute modes (link here)?
- Regarding the page table formats, I see sysmem, vidmem, and peermem. Do these represent CPU physical memory, GPU physical memory, and peer GPU physical memory, respectively?
- Lastly, I’m curious about why a sysmem physical address is allowed in the PDE page table entry. Does this suggest that part of the GPU page table resides in CPU memory, while another part resides in GPU memory? Would the GPU MMU then use bits 1:2 in the page table entry to determine the type of memory? For instance, if the memory type is vidmem, it reads directly, but if it’s sysmem, it first uses DMA to get the physical page and then continues with the page walk. If this is simply for UVM, wouldn’t it be enough for the final PTE level to indicate the memory type directly?
Thanks in advance for any insights!