When does the Orin Nano I/O pins enter POR state?


Each I/O pins on “Jetson Orin NX Series and Orin Nano Series Pinmux Config Template” have column for “POR”, and indicates the state of the pin when power-on reset is initiated. What conditions are considered to be power-on reset that will reset the I/Os into the values mentioned in the pin mux? TRM Section mentions that after cold-boot and warm-boot power cycling will result in pin-states to default to the reset values on the POR column, but are the following cases part of the warm/cold boot?

1.Orin Nano Module power up
2. POWER_EN driven low from carrier board
3. SYS_RESET* driven low from carrier board

POR seems the state controlled by the hardware rather than the pinmux configuration.
Please let me check these three cases with internal and update to you.

Yes, above operation belong to warm/cold boot.

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