When I added the following contents, the device was repeatedly booted in the boot logo, and the system could not be accessed

[848145724]

Dear all:

1. Jetpack4.6_R32.6.1, jetson tx2 nx SOM in our custom board.

2. After add following content in tegra186-p3636-0001-common.dtsi file, device get wrong.
   Continuing the discussion from TX2 NX SPI pinmux setting on R32.6.1 error:

+       pinmux@2430000 {
+               pinctrl-0 = <0x179>;
+               pinctrl-names = "default";
+               compatible = "nvidia,tegra194-pinmux";
+               reg = <0x0 0x2430000 0x0 0x17000 0x0 0xc300000 0x0 0x4000>;
+               #gpio-range-cells = <0x3>;
+               status = "okay";
+               linux,phandle = <0xab>;
+               phandle = <0xab>;
+
+               header-40pin-pinmux {
+                       phandle = <0x179>;
+                       linux,phandle = <0x179>;
+
+                       pin24 {
+                               nvidia,lpdr = <0x0>;
+                               nvidia,enable-input = <0x1>;
+                               nvidia,tristate = <0x0>;
+                               nvidia,pull = <0x2>;
+                               nvidia,pins = "spi1_cs0_pz6";
+                               nvidia,function = "spi1";
+                       };
+
+                       pin23 {
+                               nvidia,lpdr = <0x0>;
+                               nvidia,enable-input = <0x1>;
+                               nvidia,tristate = <0x0>;
+                               nvidia,pull = <0x1>;
+                               nvidia,pins = "spi1_sck_pz3";
+                               nvidia,function = "spi1";
+                       };
+
+                       pin21 {
+                               nvidia,lpdr = <0x0>;
+                               nvidia,enable-input = <0x1>;
+                               nvidia,tristate = <0x0>;
+                               nvidia,pull = <0x1>;
+                               nvidia,pins = "spi1_miso_pz4";
+                               nvidia,function = "spi1";
+                       };
+
+                       pin19 {
+                               nvidia,lpdr = <0x0>;
+                               nvidia,enable-input = <0x1>;
+                               nvidia,tristate = <0x0>;
+                               nvidia,pull = <0x1>;
+                               nvidia,pins = "spi1_mosi_pz5";
+                               nvidia,function = "spi1";
+                       };
+
+               };
+       };


+       can_clock: can_clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <8000000>;
+               clock-accuracy = <100>;
+       };
+
        spi@3210000 { /* SPI 1 to 40 pin header */
                status = "okay";
                spi@0 {
-                       compatible = "tegra-spidev";
+                       compatible = "microchip,mcp2515";
                        reg = <0x0>;
-                       spi-max-frequency = <33000000>;
+                        spi-max-frequency = <5000000>;
+                        clocks = <&can_clock>;
+                        interrupt-parent = <&tegra_main_gpio>;
+                       interrupts = <&tegra_main_gpio TEGRA_MAIN_GPIO(N, 1) GPIO_ACTIVE_HIGH>;
                        controller-data {
                                nvidia,enable-hw-based-cs;
                                nvidia,rx-clk-tap-delay = <0x8>;

[ShaneCCC]

You may need UART log to check the kernel message to know the root cause.

[848145724]

After change tegra186-mb1-bct-pinmux-p3636-0001-a00.cfg as following, i can see can1. but can1 only can receive ,can not send data.

this is dmesg follow, gpio set failed.

[ShaneCCC]

What’s the pin 22/23? Doesn’t see your dts change relative with GPIO.

[848145724]

sudo /opt/nvidia/jetson-io/jetson-io.py ， this gpio is define by nvidia.

[ShaneCCC]

Did you add those SPI pin configuration manually or that’s generate from jetson-io?

Thanks

[848145724]

I change this pinmux in following picture.

[ShaneCCC]

Please use jetson-io to configure the PINs for TX2 NX

Thanks

[848145724]

After execute sudo /opt/nvidia/jetson-io/jetson-io.py and enable spi1, device can not enter system , just restart in boot logo.

[ShaneCCC]

OK, will try if able catch the problem like you do.

Thanks

[ShaneCCC]

There is a known issue in cboot that may cause jetson IO fails to take effect.

Cboot in 32.7.2 fails to read extlinux.conf

Please try this within your cboot, reflash the cboot and it shall work with extlinux.conf. diff --git a/lib/fs/ext4/ext4.c b/lib/fs/ext4/ext4.c index c994c0f..6e8e2e7 100644 --- a/lib/fs/ext4/ext4.c +++ b/lib/fs/ext4/ext4.c @@ -244,6 +244,9 @@ uint8_t *buf_ptr = NULL; off_t total_bytes_read = 0; int err = 0; + uint32_t file_len_in_blocks = 0; + uint32_t total_blocks_read; + uint32_t block_size; LTRACE_ENTRY; @@ -254,6 +257,15 @@ } buf_ptr = (uint8_t …

[848145724]

I change cboot.bin, but it can not resolv problem.

[kayccc]

Please try with the latest JetPack 4.6.3?