Where is define of PCIe LTSSM state?

[gqiubo]

Hi
I used orin for PCIe EP mode, a x86 PC as RP. current promble is link failed.
I read PCIe register PCIE_RP_APPL_LINK_STATUS_0 is 0x00000020
PCIE_RP_APPL_DEBUG_0 sametimes is 0x00002000 and sametimes is 0x00002008. I want see LTSSM state define in PCIE_RP_APPL_DEBUG_0 register. It say Encoding is defined in databook,but where is the databook.

[WayneWWW]

please check this post

PCIe Debug

After looking into the data, which is seen by the FPGA. We noticed, that the Jetson module is sending the PCIe compliance pattern for 8b/10b. What could be the reason for this? Is there some entry in the device tree, which could lead to such a behavior? Or some levels on some pins of the module? Is it possible to readout via register, if the PCIe complex of the Jetson module is sending out the compliance pattern?

[gqiubo]

Thank you very much, that is very helpful.
Now I read the PCIE_RP_APPL_LINK_STATUS_0 is 0x00000003 and
PCIE_RP_APPL_DEBUG_0 is 0x00000088, on RP is not found pcie device.