which is the IMX219 reset pin?

which is the IMX219 reset pin?
I know the imx219 can support for Jetson TX2 and use E3322 board,but I can not find the reset pin in the dtsi file.
which is the IMX219 reset pin? eveyone who can tell me?

this two file is the dtsi file.

/*
 * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 */

#include "t18x-common-platforms/tegra186-quill-camera-e3326-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-e3323-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-e3333-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-e3322-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-li-mipi-adpt-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-imx274-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-vivid.dtsi"

#define CAM0_RST_L	TEGRA_MAIN_GPIO(R, 5)
#define CAM0_PWDN	TEGRA_MAIN_GPIO(R, 0)
#define CAM1_RST_L	TEGRA_MAIN_GPIO(R, 1)
#define CAM1_PWDN	TEGRA_MAIN_GPIO(L, 6)

/ {
	tegra-camera-platform {
		/**
		* tpg_max_iso = <>;
		* Max iso bw for 6 streams of tpg
		* streams * nvcsi_freq * PG_bitrate / RG10 * BPP
		* 6 * 102Mhz * 32 bits/ 10 bits * 2 Bps
		* = 3916.8 MBps
		*/
		tpg_max_iso = <3916800>;
	};

	/* set camera gpio direction to output */
	gpio@2200000 {
		camera-control-output-low {
			gpio-hog;
			output-low;
			gpios = <CAM0_RST_L 0 CAM0_PWDN 0
				 CAM1_RST_L 0 CAM1_PWDN 0>;
			label = "cam0-rst", "cam0-pwdn",
				"cam1-rst", "cam1-pwdn";
		};
	};

	/* all cameras are disabled by default */
	host1x {
		vi_base: vi@15700000 {
			ports {
				vi_port0: port@0 {
					status = "disabled";
					vi_in0: endpoint {
						status = "disabled";
					};
				};
				vi_port1: port@1 {
					status = "disabled";
					vi_in1: endpoint {
						status = "disabled";
					};
				};
				vi_port2: port@2 {
					status = "disabled";
					vi_in2: endpoint {
						status = "disabled";
					};
				};
				vi_port3: port@3 {
					status = "disabled";
					vi_in3: endpoint {
						status = "disabled";
					};
				};
				vi_port4: port@4 {
					status = "disabled";
					vi_in4: endpoint {
						status = "disabled";
					};
				};
				vi_port5: port@5 {
					status = "disabled";
					vi_in5: endpoint {
						status = "disabled";
					};
				};
			};
		};
		csi_base: nvcsi@150c0000 {
			csi_chan0: channel@0 {
				status = "disabled";
				ports {
					csi_chan0_port0: port@0 {
						status = "disabled";
						csi_in0: endpoint@0 {
							status = "disabled";
						};
					};
					csi_chan0_port1: port@1 {
						status = "disabled";
						csi_out0: endpoint@1 {
							status = "disabled";
						};
					};
				};
			};
			csi_chan1: channel@1 {
				status = "disabled";
				ports {
					csi_chan1_port0: port@0 {
						status = "disabled";
						csi_in1: endpoint@2 {
							status = "disabled";
						};
					};
					csi_chan1_port1: port@1 {
						status = "disabled";
						csi_out1: endpoint@3 {
							status = "disabled";
						};
					};
				};
			};
			csi_chan2: channel@2 {
				status = "disabled";
				ports {
					csi_chan2_port0: port@0 {
						status = "disabled";
						csi_in2: endpoint@4 {
							status = "disabled";
						};
					};
					csi_chan2_port1: port@1 {
						status = "disabled";
						csi_out2: endpoint@5 {
							status = "disabled";
						};
					};
				};
			};
			csi_chan3: channel@3 {
				status = "disabled";
				ports {
					csi_chan3_port0: port@0 {
						status = "disabled";
						csi_in3: endpoint@6 {
							status = "disabled";
						};
					};
					csi_chan3_port1: port@1 {
						status = "disabled";
						csi_out3: endpoint@7 {
							status = "disabled";
						};
					};
				};
			};
			csi_chan4: channel@4 {
				status = "disabled";
				ports {
					csi_chan4_port0: port@0 {
						status = "disabled";
						csi_in4: endpoint@8 {
							status = "disabled";
						};
					};
					csi_chan4_port1: port@1 {
						status = "disabled";
						csi_out4: endpoint@9 {
							status = "disabled";
						};
					};
				};
			};
			csi_chan5: channel@5 {
				status = "disabled";
				ports {
					csi_chan5_port0: port@0 {
						status = "disabled";
						csi_in5: endpoint@10 {
							status = "disabled";
						};
					};
					csi_chan5_port1: port@1 {
						status = "disabled";
						csi_out5: endpoint@11 {
							status = "disabled";
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
		e3326_cam0: ov5693_c@36 {
			status = "disabled";
		};
		e3323_cam0: ov23850_a@10 {
			status = "disabled";
		};
		e3323_vcm0: lc898212@72 {
			status = "disabled";
		};
		tca6408@21 {
			status = "disabled";
		};
		tca9548@77 {
			status = "disabled";
			i2c@0 {
				e3333_cam0: ov5693_a@36 {
					status = "disabled";
				};
				e3322_cam0: imx219_a@10 {
					status = "disabled";
				};
			};
			i2c@1 {
				e3333_cam1: ov5693_b@36 {
					status = "disabled";
				};
				e3322_cam1: imx219_b@10 {
					status = "disabled";
				};
			};
			i2c@2 {
				e3333_cam2: ov5693_c@36 {
					status = "disabled";
				};
				e3322_cam2: imx219_c@10 {
					status = "disabled";
				};
			};
			i2c@3 {
				e3333_cam3: ov5693_d@36 {
					status = "disabled";
				};
				e3322_cam3: imx219_d@10 {
					status = "disabled";
				};
			};
			i2c@4 {
				e3333_cam4: ov5693_e@36 {
					status = "disabled";
				};
				e3322_cam4: imx219_e@10 {
					status = "disabled";
				};
			};
			i2c@5 {
				e3333_cam5: ov5693_f@36 {
					status = "disabled";
				};
				e3322_cam5: imx219_f@10 {
					status = "disabled";
				};
			};
		};
		tca9546_70: tca9546@70 {
			status = "disabled";
			i2c@0 {
				imx185_cam0: imx185_a@1a {
					status = "disabled";
				};
			};
		};
		tca9546_70: tca9546@70 {
			status = "disabled";
			i2c@0 {
				imx274_cam0: imx274_a@1a {
					status = "disabled";
				};
			};
		};
	};

	i2c@c240000 {
		e3323_cam1: ov23850_c@36 {
			status = "disabled";
		};
		e3323_vcm1: lc898212@72 {
			status = "disabled";
		};
	};

	tcp: tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		modules {
			cam_module0: module0 {
				status = "disabled";
				cam_module0_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module0_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module1: module1 {
				status = "disabled";
				cam_module1_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module1_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module2: module2 {
				status = "disabled";
				cam_module2_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module2_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module3: module3 {
				status = "disabled";
				cam_module3_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module3_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module4: module4 {
				status = "disabled";
				cam_module4_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module4_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module5: module5 {
				status = "disabled";
				cam_module5_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module5_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
		};
	};
};
/*
 * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/* camera control gpio definitions */
/ {
	host1x {
		vi@15700000 {
			num-channels = <6>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					e3322_vi_in0: endpoint {
						csi-port = <0>;
						bus-width = <2>;
						remote-endpoint = <&e3322_csi_out0>;
					};
				};
				port@1 {
					reg = <1>;
					e3322_vi_in1: endpoint {
						csi-port = <1>;
						bus-width = <2>;
						remote-endpoint = <&e3322_csi_out1>;
					};
				};
				port@2 {
					reg = <2>;
					e3322_vi_in2: endpoint {
						csi-port = <2>;
						bus-width = <2>;
						remote-endpoint = <&e3322_csi_out2>;
					};
				};
				port@3 {
					reg = <3>;
					e3322_vi_in3: endpoint {
						csi-port = <3>;
						bus-width = <2>;
						remote-endpoint = <&e3322_csi_out3>;
					};
				};
				port@4 {
					reg = <4>;
					e3322_vi_in4: endpoint {
						csi-port = <4>;
						bus-width = <2>;
						remote-endpoint = <&e3322_csi_out4>;
					};
				};
				port@5 {
					reg = <5>;
					e3322_vi_in5: endpoint {
						csi-port = <5>;
						bus-width = <2>;
						remote-endpoint = <&e3322_csi_out5>;
					};
				};
			};
		};

		nvcsi@150c0000 {
			num-channels = <6>;
			channel@0 {
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3322_csi_in0: endpoint@0 {
							csi-port = <0>;
							bus-width = <2>;
							remote-endpoint = <&e3322_imx219_out0>;
						};
					};
					port@1 {
						reg = <1>;
						e3322_csi_out0: endpoint@1 {
							remote-endpoint = <&e3322_vi_in0>;
						};
					};
				};
			};
			channel@1 {
				reg = <1>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3322_csi_in1: endpoint@2 {
							csi-port = <1>;
							bus-width = <2>;
							remote-endpoint = <&e3322_imx219_out1>;
						};
					};
					port@1 {
						reg = <1>;
						e3322_csi_out1: endpoint@3 {
							remote-endpoint = <&e3322_vi_in1>;
						};
					};
				};
			};
			channel@2 {
				reg = <2>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3322_csi_in2: endpoint@4 {
							csi-port = <2>;
							bus-width = <2>;
							remote-endpoint = <&e3322_imx219_out2>;
						};
					};
					port@1 {
						reg = <1>;
						e3322_csi_out2: endpoint@5 {
							remote-endpoint = <&e3322_vi_in2>;
						};
					};
				};
			};
			channel@3 {
				reg = <3>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3322_csi_in3: endpoint@6 {
							csi-port = <3>;
							bus-width = <2>;
							remote-endpoint = <&e3322_imx219_out3>;
						};
					};
					port@1 {
						reg = <1>;
						e3322_csi_out3: endpoint@7 {
							remote-endpoint = <&e3322_vi_in3>;
						};
					};
				};
			};
			channel@4 {
				reg = <4>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3322_csi_in4: endpoint@8 {
							csi-port = <4>;
							bus-width = <2>;
							remote-endpoint = <&e3322_imx219_out4>;
						};
					};
					port@1 {
						reg = <1>;
						e3322_csi_out4: endpoint@9 {
							remote-endpoint = <&e3322_vi_in4>;
						};
					};
				};
			};
			channel@5 {
				reg = <5>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3322_csi_in5: endpoint@10 {
							csi-port = <5>;
							bus-width = <2>;
							remote-endpoint = <&e3322_imx219_out5>;
						};
					};
					port@1 {
						reg = <1>;
						e3322_csi_out5: endpoint@11 {
							remote-endpoint = <&e3322_vi_in5>;
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
		tca9548@77 {
			i2c@0 {
				imx219_a@10 {
					devnode = "video0";
					compatible = "nvidia,imx219";
					reg = <0x10>;

					physical_w = "5.095";
					physical_h = "4.930";

					sensor_model ="imx219";
					dovdd-supply = <&en_vdd_cam>;
					avdd-reg = "vana";
					dvdd-reg = "vdig";
					iovdd-reg = "dovdd";

					mode0 { // IMX219_MODE_3280X2464
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_a";
						discontinuous_clk = "yes";
						cil_settletime = "0";
						active_w = "3280";
						active_h = "2464";
						pixel_t = "bayer_rggb";
						readout_orientation = "90";
						line_length = "3448";
						inherent_gain = "1";
						mclk_multiplier = "25";
						pix_clk_hz = "224000000";

						min_gain_val = "1.0";
						max_gain_val = "16.0";
						min_hdr_ratio = "1";
						max_hdr_ratio = "64";
						min_framerate = "1.462526";
						max_framerate = "21";
						min_exp_time = "13";
						max_exp_time = "683709";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;

						port@0 {
							reg = <0>;
							e3322_imx219_out0: endpoint {
								csi-port = <0>;
								bus-width = <2>;
								remote-endpoint = <&e3322_csi_in0>;
							};
						};
					};
				};
			};

			i2c@1 {
				imx219_b@10 {
					devnode = "video1";
					compatible = "nvidia,imx219";
					reg = <0x10>;

					physical_w = "5.095";
					physical_h = "4.930";

					sensor_model ="imx219";
					avdd-reg = "vana";
					dvdd-reg = "vdig";
					iovdd-reg = "dovdd";

					mode0 { // IMX219_MODE_3280X2464
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_b";
						discontinuous_clk = "yes";
						cil_settletime = "0";

						active_w = "3280";
						active_h = "2464";
						pixel_t = "bayer_rggb";
						readout_orientation = "90";
						line_length = "3448";
						inherent_gain = "1";
						mclk_multiplier = "25";
						pix_clk_hz = "224000000";

						min_gain_val = "1.0";
						max_gain_val = "16.0";
						min_hdr_ratio = "1";
						max_hdr_ratio = "64";
						min_framerate = "1.462526";
						max_framerate = "21";
						min_exp_time = "13";
						max_exp_time = "683709";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;

						port@0 {
							reg = <0>;
							e3322_imx219_out1: endpoint {
								csi-port = <1>;
								bus-width = <2>;
								remote-endpoint = <&e3322_csi_in1>;
							};
						};
					};
				};
			};

			i2c@2 {
				imx219_c@10 {
					devnode = "video2";
					compatible = "nvidia,imx219";
					reg = <0x10>;

					physical_w = "5.095";
					physical_h = "4.930";

					sensor_model ="imx219";
					avdd-reg = "vana";
					dvdd-reg = "vdig";
					iovdd-reg = "dovdd";

					mode0 { // IMX219_MODE_3280X2464
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_c";
						discontinuous_clk = "yes";
						cil_settletime = "0";

						active_w = "3280";
						active_h = "2464";
						pixel_t = "bayer_rggb";
						readout_orientation = "90";
						line_length = "3448";
						inherent_gain = "1";
						mclk_multiplier = "25";
						pix_clk_hz = "224000000";

						min_gain_val = "1.0";
						max_gain_val = "16.0";
						min_hdr_ratio = "1";
						max_hdr_ratio = "64";
						min_framerate = "1.462526";
						max_framerate = "21";
						min_exp_time = "13";
						max_exp_time = "683709";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;

						port@0 {
							reg = <0>;
							e3322_imx219_out2: endpoint {
								csi-port = <2>;
								bus-width = <2>;
								remote-endpoint = <&e3322_csi_in2>;
							};
						};
					};
				};
			};

			i2c@3 {
				imx219_d@10 {
					devnode = "video3";
					compatible = "nvidia,imx219";
					reg = <0x10>;

					physical_w = "5.095";
					physical_h = "4.930";

					sensor_model ="imx219";
					avdd-reg = "vana";
					dvdd-reg = "vdig";
					iovdd-reg = "dovdd";

					mode0 { // IMX219_MODE_3280X2464
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_d";
						discontinuous_clk = "yes";
						cil_settletime = "0";

						active_w = "3280";
						active_h = "2464";
						pixel_t = "bayer_rggb";
						readout_orientation = "90";
						line_length = "3448";
						inherent_gain = "1";
						mclk_multiplier = "25";
						pix_clk_hz = "224000000";

						min_gain_val = "1.0";
						max_gain_val = "16.0";
						min_hdr_ratio = "1";
						max_hdr_ratio = "64";
						min_framerate = "1.462526";
						max_framerate = "21";
						min_exp_time = "13";
						max_exp_time = "683709";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;

						port@0 {
							reg = <0>;
							e3322_imx219_out3: endpoint {
								csi-port = <3>;
								bus-width = <2>;
								remote-endpoint = <&e3322_csi_in3>;
							};
						};
					};
				};
			};

			i2c@4 {
				imx219_e@10 {
					devnode = "video4";
					compatible = "nvidia,imx219";
					reg = <0x10>;

					physical_w = "5.095";
					physical_h = "4.930";

					sensor_model ="imx219";
					avdd-reg = "vana";
					dvdd-reg = "vdig";
					iovdd-reg = "dovdd";

					mode0 { // IMX219_MODE_3280X2464
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_e";
						discontinuous_clk = "yes";
						cil_settletime = "0";

						active_w = "3280";
						active_h = "2464";
						pixel_t = "bayer_rggb";
						readout_orientation = "90";
						line_length = "3448";
						inherent_gain = "1";
						mclk_multiplier = "25";
						pix_clk_hz = "224000000";

						min_gain_val = "1.0";
						max_gain_val = "16.0";
						min_hdr_ratio = "1";
						max_hdr_ratio = "64";
						min_framerate = "1.462526";
						max_framerate = "21";
						min_exp_time = "13";
						max_exp_time = "683709";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;

						port@0 {
							reg = <0>;
							e3322_imx219_out4: endpoint {
								csi-port = <4>;
								bus-width = <2>;
								remote-endpoint = <&e3322_csi_in4>;
							};
						};
					};
				};
			};

			i2c@5 {
				imx219_f@10 {
					devnode = "video5";
					compatible = "nvidia,imx219";
					reg = <0x10>;

					physical_w = "5.095";
					physical_h = "4.930";

					sensor_model ="imx219";
					avdd-reg = "vana";
					dvdd-reg = "vdig";
					iovdd-reg = "dovdd";

					mode0 { // IMX219_MODE_3280X2464
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_f";
						discontinuous_clk = "yes";
						cil_settletime = "0";

						active_w = "3280";
						active_h = "2464";
						pixel_t = "bayer_rggb";
						readout_orientation = "90";
						line_length = "3448";
						inherent_gain = "1";
						mclk_multiplier = "25";
						pix_clk_hz = "224000000";

						min_gain_val = "1.0";
						max_gain_val = "16.0";
						min_hdr_ratio = "1";
						max_hdr_ratio = "64";
						min_framerate = "1.462526";
						max_framerate = "21";
						min_exp_time = "13";
						max_exp_time = "683709";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;

						port@0 {
							reg = <0>;
							e3322_imx219_out5: endpoint {
								csi-port = <5>;
								bus-width = <2>;
								remote-endpoint = <&e3322_csi_in5>;
							};
						};
					};
				};
			};
		};
	};
};

/* camera control gpio definitions */
/ {

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";

		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <12>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		 * The general guideline for naming badge_info contains 3 parts, and is as follows,
		 * The first part is the camera_board_id for the module; if the module is in a FFD
		 * platform, then use the platform name for this part.
		 * The second part contains the position of the module, ex. “rear” or “front”.
		 * The third part contains the last 6 characters of a part number which is found
		 * in the module's specsheet from the vender.
		 */
		modules {
			module0 {
				badge = "e3322_bottomleft_A815P2";
				position = "bottomleft";
				orientation = "1";
				drivernode0 {
					pcl_id = "v4l2_sensor";
					devname = "imx219 30-0036";
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@0/imx219_a@10";
				};
				drivernode1 {
					pcl_id = "v4l2_lens";
				};
			};
			module1 {
				badge = "e3322_centerleft_A815P2";
				position = "centerleft";
				orientation = "1";
				drivernode0 {
					pcl_id = "v4l2_sensor";
					devname = "imx219 31-0036";
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@1/imx219_b@10";
				};
				drivernode1 {
					pcl_id = "v4l2_lens";
				};
			};
			module2 {
				badge = "e3322_centerright_A815P2";
				position = "centerright";
				orientation = "1";
				drivernode0 {
					pcl_id = "v4l2_sensor";
					devname = "imx219 32-0036";
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@2/imx219_c@10";
				};
				drivernode1 {
					pcl_id = "v4l2_lens";
				};
			};
			module3 {
				badge = "e3322_topleft_A815P2";
				position = "topleft";
				orientation = "1";
				drivernode0 {
					pcl_id = "v4l2_sensor";
					devname = "imx219 33-0036";
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@3/imx219_d@10";
				};
				drivernode1 {
					pcl_id = "v4l2_lens";
				};
			};
			module4 {
				badge = "e3322_bottomright_A815P2";
				position = "bottomright";
				orientation = "1";
				drivernode0 {
					pcl_id = "v4l2_sensor";
					devname = "imx219 34-0036";
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@4/imx219_e@10";
				};
				drivernode1 {
					pcl_id = "v4l2_lens";
				};
			};
			module5 {
				badge = "e3322_topright_A815P2";
				position = "topright";
				orientation = "1";
				drivernode0 {
					pcl_id = "v4l2_sensor";
					devname = "imx219 35-0036";
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@5/imx219_f@10";
				};
				drivernode1 {
					pcl_id = "v4l2_lens";
				};
			};
		};
	};
};

@sensor_test
I believe you HW design should be different with the reference e3322 you should check your HW design to find out the pin and define it into your DT.

If I use the G8 pin set to the IMX219 reset ping.
Can you offert an example for this reset define ?

You can reference to tegra186-quill-camera-e3326-a00.dtsi to modify the reset pin to what you want. The G8 pin is the GPIO R0 you can figure it out from the pinmux excel file.

/ {
27 	i2c@3180000 {
28 		ov5693_c@36 {
29 			/* Define any required hw resources needed by driver */
30 			/* ie. clocks, io pins, power sources */
31 			/* mclk-index indicates the index of the */
32 			/* mclk-name with in the clock-names array */
33 
34 			clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
35 					 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
36 			clock-names = "extperiph1", "pllp_grtba";
37 			mclk = "extperiph1";
38 			clock-frequency = <24000000>;
39 			reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
40 			pwdn-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
41 			vana-supply = <&en_vdd_cam_hv_2v8>;
42 			vif-supply = <&en_vdd_cam>;
43 		};
44 	};
45 
46 	gpio@2200000 {
47 		camera-control-output-low {
48 			gpio-hog;
49 			output-low;
50 			gpios = <CAM0_RST_L 0 CAM0_PWDN 0>;
51 			label = "cam0-rst", "cam0-pwdn";
52 		};
53 	};
54 };

Hi ShaneCCC,
Thanks!
I modify the reset define is below,please tell me if is OK or not?
1.What deos mean “GPIO R0”?

  1. I find the "tegra_main_gpio "and “gpio”in reset define,Is there any difference in this “gpio” and “tegra_main_gpio”?
#define CAM1_RST_L	TEGRA_GPIO(G, 8)

/* camera control gpio definitions */

/ {
	host1x {
		i2c@546c0000 {
					imx219_a@10 {
						/* Define any required hw resources needed by driver */
						/* ie. clocks, io pins, power sources */
						clocks = <&tegra_car TEGRA210_CLK_CLK_OUT_3>;
						clock-names = "clk_out_3";
						clock-frequency = <24000000>;
						mclk = "clk_out_3";
						/*reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;*/
                                              reset-gpios = <&gpio CAM1_RST_L GPIO_ACTIVE_HIGH>;						
					    vana-supply = <&en_vdd_cam_hv_2v8>;
					    vdig-supply = <&en_vdd_sys>;
					    dovdd-supply = <&en_vdd_cam>;
					};
				
			
		};
	};
};

There’s no (G, 8) pin. Could you check the pinmux table what the pin name is?
I thought you talk the below pin GPIO_PR0

GPIO0/CAM0_PWR#	G8	QSPI_SCK	AW39	AV37	vddio_spi			LV_CZ	BDSDMEMLV_BFCR90_VXVDP1P1P1	18k	pd	GPIO_PR0

Where are the Jetson TX1 pin define?

You can download the pinmux file from download center.