# Wifi SDIO bring up issue with Xavier NX in custom carrier board

**URL:** <https://forums.developer.nvidia.com/t/wifi-sdio-bring-up-issue-with-xavier-nx-in-custom-carrier-board/263956>\
**Category:** Jetson Xavier NX\
**Tags:** kernel\
**Created:** [August 22, 2023, 7:26am UTC](https://forums.developer.nvidia.com/t/wifi-sdio-bring-up-issue-with-xavier-nx-in-custom-carrier-board/263956 "2023-08-22T07:26:57Z")\
**Posts on this page:** 3\
**Page:** 1

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**Author:** ![dinesh.kumar2](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@dinesh.kumar2](https://forums.developer.nvidia.com/u/dinesh.kumar2)\
**Post date:** [August 22, 2023, 7:26am UTC](https://forums.developer.nvidia.com/t/wifi-sdio-bring-up-issue-with-xavier-nx-in-custom-carrier-board/263956/1 "2023-08-22T07:26:57Z")

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Hi,

I am facing issue with wifi bring up with custom board

L4T Version: 35.1  
Board : Custom carrier board with Xavier NX SOM

I am using BCM43455 module and using SDIO interface. I have defined dts configuration for sdhci and WL\_REG\_ON pin like below,

sdmmc3: sdhci@3440000 {  
compatible = “nvidia,tegra194-sdhci”, “nvidia,tegra186-sdhci”;  
reg = \<0x0 0x3440000 0x0 0x00020000\>;  
interrupts = \< 0 TEGRA194\_IRQ\_SDMMC3 0x04\>;  
iommus = \<&smmu TEGRA\_SID\_SDMMC3A\>;  
#if TEGRA\_IOMMU\_DT\_VERSION \>= DT\_VERSION\_2  
interconnects = \<&mc TEGRA194\_MEMORY\_CLIENT\_SDMMCR\>,  
\<&mc TEGRA194\_MEMORY\_CLIENT\_SDMMCW\>;  
interconnect-names = “dma-mem”, “dma-mem”;  
#endif  
dma-coherent;  
max-clk-limit = \<208000000\>;  
ddr-clk-limit = \<51000000\>;  
bus-width = \<4\>;  
cap-mmc-highspeed;  
cap-sd-highspeed;  
mmc-ocr-mask = \<0x3\>;  
disable-wp;  
sd-uhs-sdr104;  
sd-uhs-sdr50;  
sd-uhs-sdr25;  
sd-uhs-sdr12;  
mmc-ddr-1\_8v;  
mmc-hs200-1\_8v;  
cd-inverted;  
nvidia,min-tap-delay = \<96\>;  
nvidia,max-tap-delay = \<139\>;  
nvidia,vqmmc-always-on;  
pwrdet-support;  
#if TEGRA\_SDMMC\_VERSION \>= DT\_VERSION\_2  
nvidia,pad-autocal-pull-up-offset-1v8 = \<0x00\>;  
nvidia,pad-autocal-pull-down-offset-1v8 = \<0x7a\>;  
nvidia,pad-autocal-pull-up-offset-3v3-timeout = \<0x07\>;  
nvidia,pad-autocal-pull-down-offset-3v3-timeout =  
\<0x07\>;  
nvidia,pad-autocal-pull-up-offset-1v8-timeout = \<0x06\>;  
nvidia,pad-autocal-pull-down-offset-1v8-timeout =  
\<0x07\>;  
nvidia,pad-autocal-pull-up-offset-sdr104 = \<0x00\>;  
nvidia,pad-autocal-pull-down-offset-sdr104 = \<0x00\>;  
nvidia,default-tap = \<0x9\>;  
nvidia,default-trim = \<0x5\>;  
pinctrl-names = “sdmmc-3v3”, “sdmmc-1v8”;  
pinctrl-0 = \<&sdmmc3\_3v3\>;  
pinctrl-1 = \<&sdmmc3\_1v8\>;  
assigned-clocks = \<&bpmp TEGRA194\_CLK\_SDMMC3\>,  
\<&bpmp TEGRA194\_CLK\_PLLC4\_MUXED\>;  
assigned-clock-parents =  
\<&bpmp TEGRA194\_CLK\_PLLC4\_MUXED\>;  
#else  
pinctrl-names = “sdmmc\_e\_33v\_enable”, “sdmmc\_e\_33v\_disable”;  
pinctrl-0 = \<&sdmmc3\_e\_33V\_enable\>;  
pinctrl-1 = \<&sdmmc3\_e\_33V\_disable\>;  
#endif  
ignore-pm-notify;  
resets = \<&bpmp\_resets TEGRA194\_RESET\_SDMMC3\>;  
reset-names = “sdhci”;  
pll\_source = “pll\_p”, “pll\_c4\_muxed”;  
nvidia,set-parent-clk;  
nvidia,parent\_clk\_list = “pll\_p”, “pll\_p”, “pll\_p”, “pll\_p”, “pll\_p”, “pll\_c4\_muxed”, “pll\_c4\_muxed”, “pll\_c4\_muxed”, “pll\_c4\_muxed”, “pll\_c4\_muxed”, “NULL”;  
clocks = \<&bpmp\_clks TEGRA194\_CLK\_SDMMC3\>,  
\<&bpmp\_clks TEGRA194\_CLK\_PLLP\_OUT0\>,  
\<&bpmp\_clks TEGRA194\_CLK\_PLLC4\_MUXED\>,  
\<&bpmp\_clks TEGRA194\_CLK\_SDMMC\_LEGACY\_TM\>,  
\<&bpmp\_clks TEGRA194\_CLK\_SDMMC\_LEGACY\_TM\>;  
clock-names = “sdmmc”, “pll\_p”, “pll\_c4\_muxed”, “sdmmc\_legacy\_tm”, “tmclk”;  
uhs-mask = \<0x60\>;  
status = “disabled”;  
};

sdhci@3440000 {  
#address-cells = \<1\>;  
#size-cells = \<0\>;  
non-removable;  
force-non-removable-rescan;  
no-sd;  
max-clk-limit = \<25000000\>;  
only-1-8-v;  
status = “okay”;  
brcmf: brcmf@0 {  
reg = \<0\>;  
compatible = “brcm,bcm4329-fmac”;  
};  
};  
gpio@c2f0000 {  
wlan-output-high {  
gpio-hog;  
output-high;  
gpios = \<TEGRA194\_AON\_GPIO(CC, 4) 0\>;  
label = “wlan-out-high”;  
status = “okay”;  
};  
};

sdhci registeration has done with the below msg,  
[6.730410] sdhci-tegra 3440000.sdhci: BWMGR client registration for eMC Successful

but SDIO bus attach is getting failed in mmc\_send\_io\_op\_cond api call with below error msg,  
[6.938274] mmc1: req failed (CMD5): -84, retrying…

the wifi card is working fine with L4T 32.6 package with the same configurations and getting the below print as well but facing issue with L4T 35.1.

[1.664745] mmc1: new ultra high speed SDR104 SDIO card at address 0001

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<div class="post-metadata">

**Author:** ![WayneWWW](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/waynewww/32/14043_2.png) [@WayneWWW](https://forums.developer.nvidia.com/u/WayneWWW)\
**Post date:** [August 22, 2023, 9:11am UTC](https://forums.developer.nvidia.com/t/wifi-sdio-bring-up-issue-with-xavier-nx-in-custom-carrier-board/263956/3 "2023-08-22T09:11:38Z")

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Wifi SDIO is not validated on Xavier. Please check other post shared by other users and see if any working case.

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<div class="post-metadata">

**Author:** ![system](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/system/32/68080_2.png) [@system](https://forums.developer.nvidia.com/u/system)\
**Post date:** [September 13, 2023, 2:16am UTC](https://forums.developer.nvidia.com/t/wifi-sdio-bring-up-issue-with-xavier-nx-in-custom-carrier-board/263956/5 "2023-09-13T02:16:22Z")

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