will there be any chance that "dma_alloc_coherent @ tegra-tx2-platform" use cacheable physical memory ?

hi, all

will there be any chance that “dma_alloc_coherent @ tegra-tx2-platform” use cacheable physical memory ?

i know that by linux default, dma_alloc_coherent uses uncacheable memory.

my problem :

our customized platform is designed based on TX2, with the following topology:

     camera <--> FPGA <===PCIE,Gen2, x4===> TX2

in the driver (onbehalf of the PCIE endpoint inside the FPGA), we repeatedly use

to obtain contiguous memory chunks for buffering the video frames (coming from the FPGA via PCIE link)

then we use Standard Linux FrameBuffer technique to display the captured video on the screen

the workflow is correct, and we've seen the correctly displayed frames.

BBBBut, from time to time, we can observe that there are some irregular  cracks (just like partially broken glasses)
in the displayed (note, we use Linux FrameBuffer to display) video frames.

So, will "dma_alloc_coherent  @ tegra-tx2-platform" overwrite the default linux behavior and allocate
cacheable memory during the call.

If yes, then i guess my problem is caused by the cache incoherency (FPGA writes TX2's LPDDR4 directly but
ARM/Cortex is not aware of that)

In that case, any recommended remedies ?

No. Your understanding is correct and in TX2, dma_alloc_coherent() returns uncacheable memory.

Hi Phoenixlee,

I meet the same problem as you. I used reserved memory to PCIE DMA. And disable pcie iommu in tx2-i. I also see some irregular cracks in display. I gass cache coherent case this problem and in my driver I added flush_cache_vmap API to flush cache. But this could not help.
Have you did fix this problem?