Xavier board ,my camera mipi work normal,Xavier can not receive data

I use mipi analyze test the camera mipi. I find mipi work normal.
But I can not receive camera data in Xavier.I think Xaiver config is ok,because another camera can work normal. How can I see mipi peripheral status, like crc error,or other error.

Get the trace log to check.

https://elinux.org/Jetson/l4t/Camera_BringUp#Steps_to_enable_more_debug_messages

Hi,
Thank you,I will get the trace log first.
What is the function of host1x?
Where can I find the host1x peripheral information?

Hi,
When I open /dev/video0 device to receive mipi data.I find I can not receive video data.
When I see mipi csi trace data, I can not find error like crc error.Below is the trace data . * Can you help me analyze what this problem ? Thank you !

It could be the LP sequence error. normally, it should follow by LP11->LP01->LP00->LP11 sequence. so, it’s more like a hardware issue.

Hi,
Thank you for your reply.
I want to know whether this is caused by a signal quality, or there is a problem with the signal timing sequence of mipi tx output.

It could be sensor timing or HW cause the problem.

Thanks

It is a signal quality problem, right?

Hi ,
I want to know how to determine the error type ? Do you mean status 0x8 Indicates the error type? Can you give me the status error list.
Another question why I can not see mipi rx data crc error?

You can check the TRM for the REG NVCSI_PHY_0_CILA_INTR_0_STATUS_CILA_0

Where can I get the TRM?
I want to know how to determine the error type ? Do you mean status 0x8 Indicates the error type? Can you give me the status error list.

Get from the download center. It bit map of the NVCSI_PHY_0_CILA_INTR_0_STATUS_CILA_0 REG.

ok,I will check download center ,thank you!
I change the mipi timing config and I get the new error. Can you help me analyze what this problem ?

Doesn’t looks like receive any validate data from MIPI bus.

Thanks

  • I measured it with an oscilloscope, and there was data on the waveform.
  • What do you think might be the cause of this problem.

It could be the timing issue.

Could be LP sequence error. normally, it should follow by LP11->LP01->LP00->LP11 sequence. so, it’s more like a hardware issue.

Hi,
We check the mipi pin , find that lane0-1 p n pin is connected backwards.
We fix this problem .But we get a new error ,can you help me to analyze this problem? Thank you !

The tell the SOT multiple bits error. Could be the settle time problem.
Please confirm the time like below.

Hi,
Thank you for your reply.
Where can I find the document in your screenshot?
This seems very helpful for analyzing MIPI issues.

Suppose the MIPI DPHY spec should have it.

Thanks