xavier csi capture problem

Our design is imx390–>ub953–>ub960–>xavier(xavier core board + our own carrier board),
we use CSI-2-D0,D1,CSI-3-D0,D1 and CSI-2-CLK as the csi(4 lane)pins.In our dts file,we set the port-index property and bus-width property like this:
port-index = <2>;
bus-width = <4>;
and we can be sure the ub960 CSI pins has signal,but when we run this cmd:
v4l2-ctl --set-fmt-video=width=1920,height=1080,pixelformat=RG12 --stream-mmap --set-ctrl=sensor_mode=0 --set-ctrl bypass_mode=0 --stream-count=100 -d /dev/video0,
it shows noting,the trace log and kernl log are as follows,can anybody help?

trace log:
kworker/1:2-6416 [001] … 3108.304357: rtcpu_start: tstamp:97392183043
kworker/1:2-6416 [001] … 3108.304360: rtos_queue_send_from_isr_failed: tstamp:97392224100 queue:0x0bcc10a0
kworker/1:2-6416 [001] … 3108.304362: rtos_queue_send_from_isr_failed: tstamp:97392224226 queue:0x0bcc49d8
kworker/1:2-6416 [001] … 3108.304364: rtos_queue_send_from_isr_failed: tstamp:97392224353 queue:0x0bcc6558
kworker/1:2-6416 [001] … 3108.304365: rtos_queue_send_from_isr_failed: tstamp:97392224476 queue:0x0bcc7318
kworker/1:2-6416 [001] … 3108.304367: rtos_queue_send_from_isr_failed: tstamp:97392224598 queue:0x0bcc80d8
kworker/1:2-6416 [001] … 3108.304372: rtcpu_string: tstamp:97392232173 id:0x04010000 str:“vi5_hwinit: firmware CL2018061801 protocol versi”
kworker/1:2-6416 [001] … 3108.304376: rtcpu_string: tstamp:97392232280 id:0x04010000 str:"on 2.2
"
kworker/1:2-6416 [001] … 3108.304554: rtos_queue_send_from_isr_failed: tstamp:97392302881 queue:0x0bcc10a0
kworker/1:2-6416 [001] … 3108.304556: rtos_queue_send_from_isr_failed: tstamp:97392303012 queue:0x0bcc49d8
kworker/1:2-6416 [001] … 3108.304557: rtos_queue_send_from_isr_failed: tstamp:97392303142 queue:0x0bcc6558
kworker/1:2-6416 [001] … 3108.304559: rtos_queue_send_from_isr_failed: tstamp:97392303265 queue:0x0bcc7318
kworker/1:2-6416 [001] … 3108.304560: rtos_queue_send_from_isr_failed: tstamp:97392303388 queue:0x0bcc80d8
kworker/1:2-6416 [001] … 3108.304616: rtcpu_vinotify_event: tstamp:97392544944 tag:RESERVED_18 channel:0x23 frame:0 vi_tstamp:97191742848 data:0x10000000
kworker/1:2-6416 [001] … 3108.304618: rtcpu_vinotify_event: tstamp:97392545102 tag:RESERVED_18 channel:0x23 frame:0 vi_tstamp:97191746656 data:0x31000001
kworker/1:2-6416 [001] … 3108.304620: rtcpu_vinotify_event: tstamp:97392545263 tag:RESERVED_19 channel:0x23 frame:0 vi_tstamp:97191747680 data:0x07020001
kworker/1:2-6416 [001] … 3108.304621: rtcpu_vinotify_event: tstamp:97392545382 tag:RESERVED_18 channel:0x23 frame:0 vi_tstamp:97191780864 data:0x10000000
kworker/1:2-6416 [001] … 3108.304623: rtcpu_vinotify_event: tstamp:97392545538 tag:RESERVED_18 channel:0x23 frame:0 vi_tstamp:97191784736 data:0x31000002
kworker/1:2-6416 [001] … 3108.416163: rtos_queue_peek_from_isr_failed: tstamp:97397175280 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3108.584152: rtos_queue_peek_from_isr_failed: tstamp:97402175280 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3108.752220: rtos_queue_peek_from_isr_failed: tstamp:97407175281 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3108.920209: rtos_queue_peek_from_isr_failed: tstamp:97412175276 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3109.088152: rtos_queue_peek_from_isr_failed: tstamp:97417175279 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3109.256115: rtos_queue_peek_from_isr_failed: tstamp:97422175280 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3109.424149: rtos_queue_peek_from_isr_failed: tstamp:97427175279 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3109.536143: rtos_queue_peek_from_isr_failed: tstamp:97432175279 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3109.704118: rtos_queue_peek_from_isr_failed: tstamp:97437175280 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3109.872258: rtos_queue_peek_from_isr_failed: tstamp:97442175280 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3110.040145: rtos_queue_peek_from_isr_failed: tstamp:97447175279 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3110.208119: rtos_queue_peek_from_isr_failed: tstamp:97452175280 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3110.376130: rtos_queue_peek_from_isr_failed: tstamp:97457175279 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3110.544095: rtos_queue_peek_from_isr_failed: tstamp:97462175279 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3110.656258: rtos_queue_peek_from_isr_failed: tstamp:97467175281 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3110.828274: rtos_queue_peek_from_isr_failed: tstamp:97472175279 queue:0x0bcc8ef0
kworker/1:2-6416 [001] … 3110.828286: rtos_queue_send_from_isr_failed: tstamp:97472367160 queue:0x0bcc10a0
kworker/1:2-6416 [001] … 3110.828292: rtos_queue_send_from_isr_failed: tstamp:97472367290 queue:0x0bcc49d8

kernel log:
[RCE] vi5_hwinit: firmware CL2018061801 protocol version 2.2
[ 3110.816231] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 3110.816732] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 3110.817290] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 3110.829180] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 3113.376819] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 3113.377763] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 3113.378801] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 3113.388887] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 3115.904303] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 3115.904964] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 3115.905357] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 3115.914608] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel

From the trace log csi/vi didn’t receive any validate data from sensor.
You may need to probe the signal to check.

Hi,
ShaneCCC,thanks for your suport,the attachments shows the signal we detect from the csi pins,xavier still can not recognize it.
any suggestions?

Hi,
ShaneCCC,bellow is our dts file,and I put part of the hardware design in the Attachments,if there is something wrong,please tell me,thanks!

#include “dt-bindings/gpio/tegra194-gpio.h”
#include “dt-bindings/clock/tegra194-clock.h”
/{
host1x {
vi@15c10000 {
num-channels = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
status = “okay”;
xavier_vi_in0: endpoint {
status = “okay”;
port-index = <2>;
bus-width = <4>;
remote-endpoint = <&xavier_csi_out0>;
};
};
};
};

	nvcsi@15a00000 {
		num-channels = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		channel@0 {
			reg = <0>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					xavier_csi_in0: endpoint@0 {
						port-index = <2>;
						bus-width = <4>;
						remote-endpoint = <&ds90ub960_csi_out0>;
					};
				};
				port@1 {
					reg = <1>;
					xavier_csi_out0: endpoint@1 {
                        remote-endpoint = <&xavier_vi_in0>;
					};
				};
			};
		};
	}; 
};

i2c@c240000 {
    status = "okay";
    #address-cells = <1>;
    #size-cells = <0>;
    ds90ub960_a@30 {
        compatible = "ti,ds90ub960_q1";
        reg = <0x30>;
        devnode = "video0";

        clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH2>,
                <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>;
        clock-names = "extperiph2", "pllp_grtba";
        mclk = "extperiph2";

        pocctl-gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(A, 0) GPIO_ACTIVE_LOW>;

        /* Physical dimensions of sensor */        
        physical_w = "5.76"; /*may *2 according to ds90ub960 settings*/
        physical_h = "3.24"; /*may *2 according to ds90ub960 settings*/

        /* Defines number of frames to be dropped by driver internally after applying */
        /* sensor crop settings. Some sensors send corrupt frames after applying */
        /* crop co-ordinates */
        post_crop_frame_drop = "0"; 

        /* Define any required hw resources needed by driver */
        /* ie. clocks, io pins, power sources */
        //avdd-reg = "vana";
        //iovdd-reg = "vif";

        /* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
        use_decibel_gain = "true"; 

        /* if true, delay gain setting by one frame to be in sync with exposure */
        //delayed_gain = "true";

        /* enable CID_SENSOR_MODE_ID for sensor modes selection */
        use_sensor_mode_id = "true"; 

        sensor_model ="ds90ub960";
        mode0 {/*mode DS90UB960_MODE_1920X1080_CROP_30FPS*/
            mclk_khz = "25000";
            num_lanes = "4";
            tegra_sinterface = "serial_a";
            phy_mode = "DPHY";
            discontinuous_clk = "no"; 
            dpcm_enable = "false";
            cil_settletime = "0";

            dynamic_pixel_bit_depth = "12";
            csi_pixel_bit_depth = "12";//"16"; 
            mode_type = "bayer";//"yuv";
            pixel_phase = "rggb";//"yuyv";// 

            active_w = "1920";
            active_h = "1080";
            readout_orientation = "180";                                  
            line_length = "1920";
            inherent_gain = "1";
            mclk_multiplier = "20";
            pix_clk_hz = "742500000";/*This value is calculated based on input clock (mclk) and PLL settings from sensor*/
                                    /*mode table. Please refer to sensor data sheet for how to calculate this value.*/
            min_gain_val = "1.0"; /* dB */
            max_gain_val = "16"; /* dB */
            min_hdr_ratio = "1";
            max_hdr_ratio = "1";
            min_framerate = "6";
            max_framerate = "30";
            min_exp_time = "30";
            max_exp_time = "660000";
            embedded_metadata_height = "0";
    };
    ports {
        #address-cells = <1>;
        #size-cells = <0>;
        port@0 {
            reg = <0>;
            ds90ub960_csi_out0: endpoint {
                port-index = <2>;
                bus-width = <4>;
                remote-endpoint = <&xavier_csi_in0>;
                };
            };
        };
    };
};

tegra-camera-platform {
	compatible = "nvidia, tegra-camera-platform";
	/**
	* Physical settings to calculate max ISO BW
	*
	* num_csi_lanes = <>;
	* Total number of CSI lanes when all cameras are active
	*
	* max_lane_speed = <>;
	* Max lane speed in Kbit/s
	*
	* min_bits_per_pixel = <>;
	* Min bits per pixel
	*
	* vi_peak_byte_per_pixel = <>;
	* Max byte per pixel for the VI ISO case
	*
	* vi_bw_margin_pct = <>;
	* Vi bandwidth margin in percentage
	*
	* max_pixel_rate = <>;
	* Max pixel rate in Kpixel/s for the ISP ISO case
	* Set this to the highest pix_clk_hz out of all available modes.
	*
	* isp_peak_byte_per_pixel = <>;
	* Max byte per pixel for the ISP ISO case
	*
	* isp_bw_margin_pct = <>;
	* Isp bandwidth margin in percentage
	*/
	num_csi_lanes = <12>;          
	max_lane_speed = <1620000>;    
	min_bits_per_pixel = <10>;     
	vi_peak_byte_per_pixel = <2>;  
	vi_bw_margin_pct = <25>;       
	//max_pixel_rate = <160000>;   
	isp_peak_byte_per_pixel = <5>; 
	isp_bw_margin_pct = <25>;      
	modules {
        module0 {
            badge = "ds90ub960";
            position = "front";
            orientation = "1";
            drivernode0 {
                /* Declare PCL support driver (classically known as guid)  */
                pcl_id = "v4l2_sensor";
                /* Driver v4l2 device name */
                devname = "ds90ub960 2-2c-6c";
                /* Declare the device-tree hierarchy to driver instance */
                proc-device-tree = "/proc/device-tree/i2c@c240000/ds90ub960_a@30";
            };
        }; 
    };
};    

};

HDW_design.png
dts_file.TXT (6.14 KB)

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