Xavier fan is turned on after enabling pex-refclk-sel-high

I am trying to enable PCIE C5 as endpoint. Then pex-refclk-sel-low is disabled and pex-refclk-sel-high is enabled in device tree.

--- a/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-0000-a00.dtsi
+++ b/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-0000-a00.dtsi
@@ -75,7 +75,7 @@
                        output-high;
                        gpios = <TEGRA194_AON_GPIO(AA, 5) 0>;
                        label = "pex_refclk_sel_high";
-                       status = "disabled";
+                       status = "okay";
                };
        };
--- a/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-p2822-pcie-plugin-manager.dtsi
+++ b/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-p2822-pcie-plugin-manager.dtsi
@@ -62,10 +62,6 @@
                        override@1 {
                        };
                        override@2 {
-                               target = <&{/gpio@c2f0000/pex-refclk-sel-low}>;
-                               _overlay_ {
-                                       status = "okay";
-                               };
                        };
                };

But I found that the fun is turned on after I made these pex-refclk-sel related change.
Does anybody know the reason?

I have checked the fan related parameter in /sys/kernel/debug/tegra_fan
temp_control = 1
cur_pwm = 0
target_pwm = 0

But the fan is running all the time.

Is this synopsis similar to yours? Could you check?

https://devtalk.nvidia.com/default/topic/1048433

I cannot see your comment. Could you try again?

It isn’t the same one. Mine is “Fan works all the time when I enable end-point mode for PCIE C5 controller”.
Thanks.

zhuce_cgf,

May I ask where did you get such info of PCIe endpoint configuration?
In fact, pcie endpoint mode is going to be support for next release.

I did it by myself. And I referred to the document “Nvidia JETSON AGX Xavier PCIe ENDPOINT DESIGN GUIDELINES”.

By the way, the fan works normally after modifying “ODMDATA=0x9191000” as your suggestion in my post:
https://devtalk.nvidia.com/default/topic/1048611/jetson-agx-xavier/use-pcie-to-communicate-between-two-xaviers-ep-reports-quot-uphy-init-failed-for-pcie-ep-22-quot-/post/5321765/?offset=6#5322270

Okay. I will check the fan problem on my side. Thanks.

Hi zhuce_cgf,

I don’t have this fan issue on my side. To me, I think your issue is similar to https://devtalk.nvidia.com/default/topic/1048433.

In that thread, the pwm polarity is set to inverted by default. To confirm it, please check if setting target_pwm = 255 woud stop the fan.