Xavier flashing hangs at tegrarcm_v2 –isapplet with JetPack_5.0_DP

Hi cuitggyy:

follow the steps you said,I can flash too ,
wonderful!

Thanks for sharing this info. We will debug it.

Thanks cuitggyy, legend.

Couldn’t flash JP5 to our Xavier NX 8GB (production SOM) on Leetop A205 carrier boards without commenting out the eeprom stuff.

After commenting out eeprom lines, my flash can now complete, but the board won’t come up, uart shows it gets into a loop:

Jetson UEFI firmware (version r34.1-975eef6 built on 2022-04-06T11:46:12-07:00)
Press ESCAPE for boot options **  WARNING: Test Key is used.  **
......
      ASSERT [L4TLauncher] /dvs/git/dirty/git-master_linux/out/nvidia/bootloader/uefi/Jetson_RELEASE/edk2/MdePkg/Library/BaseLib/String.c(37): String != ((void *) 0)

Resetting the system in 5 seconds.


according to the threads:
https://forums.developer.nvidia.com/t/jetpack-5-0-dp-ethernet-port-rgmii-not-working-with-ksz9031/211097
https://forums.developer.nvidia.com/t/cannot-reflash-agx-device-incorrect-eeprom-values/211428
https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/jetson_eeprom_layout.html
nvethernet driver has changed, I think EEPROM plays an important role in r34.1(JP5.0); But some custom board (just like mine) maybe disable the EEPROM or in different connection. Comment out “EEPROM section” is just for flash.sh could work well temporaily, not a best solution.

I found ksz9896 switch and CAN ports could not adapt r34.1 using “old way” hardware dts, and I also want to know how to adapt ksz989X switch in r34.1(JP5.0)

I tried the suggestion from this thread and only commented out the eeprom section of tegra194-mb1-bct-misc-flash.cfg, left other cfg files unchanged. Flash completes, but boot fails with different errors:

....
[0068.289] I> Writing VER partition.
[0068.292] I> Writing device 1: 3.
[0068.296] I> Writing APP partition.
] I> Writing mts-proper_b partition.
[0635.019] I> Writing cpu-bootloader_b partition.
[0635.193] I> Writing secure-os_b partition.
[0635.224] I> Writing eks_b partition.
[0635.228] I> Writing bpmp-fw_b partition.
[0635.279] I> Writing bpmp-fw-dtb_b partition.
[0635.329] I> Writing xusb-fw_b partition.
[0635.337] I> Writinriting sc7_b partition.
[0635.391] I> Writing kernel_b partition.
[0637.465] I> Writing kernel-dtb_b partition.
[0639.827] I> Writing recovery-dtb partition.
[0639.848] I> Writing esp partition.
0] I> rst_source: 0xb, rst_level: 0x1
[0000.095] I> Boot-device: SDMMC (instance: 3)
[0[0000.161] W> Skipping boost for clk: CAN2
[0000.165] I> Boot-d94] W>  MEMIO rail config not found in BCT
[0000.212] I> sdmmc bdev is already initialized
[0000.256] W>  Platform config not found in BCT
[0000.290] I> MB1 done

����main enter
SPE VERSION #: R01.00.18 Created: Jan 29 2021 @ 14:18:27
HW Function test
Start Scheduler.
in late init
��
  [0000.299] I> Welcome to MB2(TBoolue data = 70020000, size = 0.
[0000.307] W> device prod regist0000.320] I> sdmmc-3 params source = boot args
[0000.323] I> sdns in SDMMC_BOOT (instance 3)
[0000.338] I> Found 41 partitions _a
[0000.348] I> Active Boot chain : 0
[0000.375] I> Relocati[0000.402] E> I2C: slave not found in slaves.
[0000.403] E> I2C: Could not write 0 bytes to slave: 0x00ae with repeat start true.
[0000.404] E> I2C_DEV: Failed to send register address 0x000ize 1 from slave 0xae at 0x00000000 via instance 0.
[0000.405]  to read CVB eeprom data @ AE
[0000.414] I> Retrying CVB eepromnd in slaves.
[0000.423] E> I2C: Could not write 0 bytes to slave: 0x00ac with repeat start true.
[0000.430] E> I2C_DEV: Faileould not read 256 registers of size 1 from slave 0xac at 0x00000ave device
[0000.450] I> Failed to read CVB eeprom data @ AC

I find out only modify “EEPROM section” statements at last only in these files:
bootloader/t186ref/BCT/tegra194-mb1-bct-misc-flash.cfg
bootloader/t186ref/BCT/tegra194-mb1-bct-misc-l4t.cfg
the flash.sh works well on my custom board.

eeprom.cvm_eeprom_i2c_instance = 0;
eeprom.cvm_eeprom_i2c_slave_address = 0xa0;
#eeprom.cvm_eeprom_read_size = 256;
eeprom.cvm_eeprom_read_size = 0;
eeprom.cvb_eeprom_i2c_instance = 0;
eeprom.cvb_eeprom_i2c_slave_address = 0xae;
#eeprom.cvb_eeprom_read_size = 256;
eeprom.cvb_eeprom_read_size = 0;

bootloader/tegra194-.cfg is generated by bootloader/t186ref/BCT/tegra194-.cfg

When I use above minimal changes, more hardware vendor information was shown in kernel dmesg out.

1 Like

ok, I tried the suggestion to only modify bootloader/t186ref/BCT/tegra194-mb1-bct-misc-flash.cfg and change the two lines from 256 to 0.

Still can’t boot, but with different errors from uart:

...
[0641.682] I> Writing sc7_b partition.
[0641.687] I> Writing kernel_b partition.
[0643.783] I> Writing kernel-dtb_b partition.
[0643.804] I> Writing recovery partition.
[0646.114] I> Writing recovery-dtb partition.
[0646.136] I> Writing esp partition.
[0649.465] I> Writing BCT partition.
[0649.561] I> Writing MB1_BCT partition.
[0649.571] I> Writing MB1_BCT_b partition.
[0649.668] I> Writing MEM_BCT partition.
[0649.776] I> Writing MEM_BCT_b partition.
��
[0000.053] W> RATCHET: MB1 binary ratchet value 4 is larger than ratchet level 1
 from HW fuses.
[0000.061] I> MB1 (prd-version: 2.2.0.0-t194-41334769-3540ffaa)
[0000.067] I> Boot-mode: Coldboot
[0000.070] I> Platform: Silicon
[0000.073] I> Chip revision : A02
[0000.076] I> Bootrom patch version : 7 (correctly patched)
[0000.081] I> ATE fuse revision : 0x200
[0000.084] I> Ram repair fuse : 0x0
[0000.087] I> Ram Code : 0x0
[0000.090] I> rst_source: 0xb, rst_level: 0x1
[0000.095] I> Boot-device: SDMMC (instance: 3)
[0000.111] I> sdmmc DDR50 mode
[0000.115] I> Boot chain mechanism: A/B
[0000.119] I> Current Boot-Chain Slot: 0
[0000.122] W> No valid slot number is found in scratch register
[0000.128] W> Return default slot: _a
[0000.132] W> PROD_CONFIG: device prod data is empty in MB1 BCT.
[0000.138] I> Temperature = 32500
[0000.141] W> Skipping boost for clk: BPMP_CPU_NIC
[0000.145] W> Skipping boost for clk: BPMP_APB
[0000.149] W> Skipping boost for clk: AXI_CBB
[0000.153] W> Skipping boost for clk: AON_CPU_NIC
[0000.157] W> Skipping boost for clk: CAN1
[0000.161] W> Skipping boost for clk: CAN2
[0000.165] I> Boot-device: SDMMC (instance: 3)
[0000.174] I> Sdmmc: HS400 mode enabled
[0000.179] I> Non-ECC region[0]: Start:0x80000000, End:0x100000000
[0000.185] W>  Thermal config not found in BCT
[0000.194] W>  MEMIO rail config not found in BCT
[0000.212] I> sdmmc bdev is already initialized
[0000.256] W>  Platform config not found in BCT
[0000.290] I> MB1 done

����main enter 
SPE VERSION #: R01.00.18 Created: Jan 29 2021 @ 14:18:27
HW Function test
Start Scheduler.
in late init   
��
  [0000.299] I> Welcome to MB2(TBoot-BPMP) (version: default.t194-mobile-2fb96459)
[0000.300] I> DMA Heap @ [0x526fa000 - 0x52ffa000]
[0000.300] I> Default Heap @ [0xd486400 - 0xd48a400]
[0000.301] E> DEVICE_PROD: Invalid value data = 70020000, size = 0.
[0000.307] W> device prod register failed
[0000.311] I> Boot_device: SDMMC_BOOT instance: 3
[0000.315] I> sdmmc-3 params source = boot args
[0000.321] I> sdmmc-3 params source = boot args
[0000.324] I> sdmmc bdev is already initialized
[0000.332] I> Found 21 partitions in SDMMC_BOOT (instance 3)
[0000.338] I> Found 41 partitions in SDMMC_USER (instance 3)
[0000.340] W> No valid slot number is found in scratch register
[0000.344] W> Return default slot: _a
[0000.348] I> Active Boot chain : 0
[0000.375] I> Relocating BR-BCT
[0000.376]  > DEVICE_PROD: device prod is not initialized.
[0000.401] E> I2C: slave not found in slaves.
[0000.401] E> I2C: Could not write 0 bytes to slave: 0x00ae with repeat start true.
[0000.403] E> I2C_DEV: Failed to send register address 0x00000000.
[0000.404] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xae at 0x00000000 via instance 0.
[0000.404] E> eeprom: Failed to read I2C slave device
[0000.407] I> Failed to read CVB eeprom data @ AE
[0000.412] I> Retrying CVB eeprom read @ AC ...
[0000.417] E> I2C: slave not found in slaves.
[0000.421] E> I2C: Could not write 0 bytes to slave: 0x00ac with repeat start true.
[0000.428] E> I2C_DEV: Failed to send register address 0x00000000.
[0000.434] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xac at 0x00000000 via instance 0.
[0000.443] E> eeprom: Failed to read I2C slave device
[0000.448] I> Failed to read CVB eeprom data @ AC
[0000.452] E> Error getting EEPROM data!
[0000.456] E> cpubl: Parallel task execution failed
[0000.461] I> �



1 Like

I think you need to know the hardware architecture of your board first, some custom board use eeprom not in tegra offical way.

According to your log before, I guess r34.1 jetson uefi need to read from eeprom to get hardware information like MAC/Wifi/Bluetooth. When commenting out all eeprom section, flash.sh works without flashing eeprom, but jetson uefi read this nothing by default, so the board would not come up.

“flash” suffix .cfg file works at board flash stage, “l4t” suffix .cfg file works at board boot stage.
In your last log, I guess “cvm_eeprom_i2c_slave_address” or “cvb_eeprom_i2c_slave_address” maybe not adapt the default value on your board. It also explain why uefi read from cvm or cvb i2c_slave_address by default but can not boot up.

eeprom is not used in custom board. Based on this post,

  • This is not a mandatory design. Most of custom boards from other vendors don’t even have such eeprom on their board.

Have you also changed bootloader/t186ref/BCT/tegra194-mb1-bct-misc-l4t.cfg but not only that one with “-flash” in the file name?

Hi All,

I replaced all the tegra194-mb1-bct-misc-X.cfg files as below, AGX flash and bootup on our own carried board success.

EEPROM flags 
eeprom.cvm_eeprom_i2c_instance = 0;
eeprom.cvm_eeprom_i2c_slave_address = 0xa0;
eeprom.cvm_eeprom_read_size = 256;
eeprom.cvb_eeprom_i2c_instance = 0;
eeprom.cvb_eeprom_i2c_slave_address = 0xae;
eeprom.cvb_eeprom_read_size = 256;

to

#### EEPROM flags ####
eeprom.cvm_eeprom_i2c_instance = 0;
eeprom.cvm_eeprom_i2c_slave_address = 0xa0;
eeprom.cvm_eeprom_read_size = 0;
#eeprom.cvm_eeprom_read_size = 256;
eeprom.cvb_eeprom_i2c_instance = 0;
eeprom.cvb_eeprom_i2c_slave_address = 0xae;
eeprom.cvb_eeprom_read_size = 0;
#eeprom.cvb_eeprom_read_size = 256;

Thanks for reply @Luna2020 . Is there any problem on the board after you did that?

For example, whether the ethernet fails to get mac address, something like that. The mac address is from cvm eeprom, so I want to make sure that is still working or not.

Hi WayneWWW,

I’m testing now, the ethernet failed to get mac address and can’t make ethernet connetion.

[    9.551292] nvethernet 2490000.ethernet: Adding to iommu group 30
[    9.560207] nvethernet 2490000.ethernet: failed to read skip mac reset flag, default 0
[    9.575614] nvethernet 2490000.ethernet: failed to read MDIO address
[    9.587307] nvethernet 2490000.ethernet: setting to default DMA bit mask
[    9.602179] nvethernet 2490000.ethernet: set default TXQ to TC mapping
[    9.614602] nvethernet 2490000.ethernet: Setting default PTP RX queue
[    9.619846] nvethernet 2490000.ethernet: failed to get eqos_rx_m clk
[    9.633681] nvethernet 2490000.ethernet: failed to get eqos_rx_input clk
[    9.633687] nvethernet 2490000.ethernet: failed to get eqos_tx_divider clk
[    9.634965] ether_get_mac_address_dtb: bad mac address at /chosen/nvidia,ether-mac: NULL.
[    9.660284] nvethernet 2490000.ethernet: No MAC address in local DT!
[    9.660293] nvethernet 2490000.ethernet: failed to get MAC address
[    9.673494] nvethernet: probe of 2490000.ethernet failed with error -22
[   12.615709] using random self ethernet address

Hi,

Can you

  1. For the “flash*.cfg”, disable both CVM and CVB eeprom.

  2. But for that cfg file without “flash”, please remove CVB eeprom only and leave CVM eeprom read working

  1. For the “flash*.cfg”, disable both CVM and CVB eeprom.
    For the “flash*.cfg” disable both CVM and CVB eeprom, only flash.sh works, but after flash, the OS can not bring up.
    modify eeprom in both “flash*.cfg” and “l4t*.cfg”, flash.sh works and OS can bring up.

  2. But for that cfg file without “flash”, please remove CVB eeprom only and leave CVM eeprom read working
    flash can not work when remove CVB eeprom only and leave CVM eeprom read working.

so, modify eeprom section in files
bootloader/t186ref/BCT/tegra194-mb1-bct-misc-flash.cfg
bootloader/t186ref/BCT/tegra194-mb1-bct-misc-l4t.cfg

eeprom.cvm_eeprom_read_size = 0;
eeprom.cvb_eeprom_read_size = 0;

./flash.sh jetson-xavier mmblk0p1
works and os can bring up on my board.

If only modify “flash*.cfg”, leave “l4t*.cfg”
./flash.sh -r -k kernel jetson-xavier mmblk0p1
works;
But
./flash.sh jetson-xavier mmblk0p1
could not work, hang as before.

Hi @cuitggyy ,

Sorry that I am a little confused by reading your comment.

Make it more easier to understand → tegra194-mb1-bct-misc-flash.cfg is only for flash.

→ tegra194-mb1-bct-misc-l4t.cfg is for boot.

Are you saying that if you only disable CVB eeprom read in tegra194-mb1-bct-misc-l4t.cfg, you still not able to boot up?

yes.

→ tegra194-mb1-bct-misc-flash.cfg is only for flash.
→ tegra194-mb1-bct-misc-l4t.cfg is for boot.

my test show this result.

if only modify tegra194-mb1-bct-misc-flash.cfg,
“./flash -r -k kernel jetson-xavier mmcblk0p1” works ok;
“./flash jetson-xavier mmcblk0p1” will error at last and hang.

if modify tegra194-mb1-bct-misc-flash.cfg and tegra194-mb1-bct-misc-l4t.cfg
“./flash -r -k kernel jetson-xavier mmcblk0p1” and “./flash jetson-xavier mmcblk0p1” both works.

We will check. Sorry for inconvenience.

For bootloader/t186ref/BCT/tegra194-mb1-bct-misc-l4t.cfg, I set eeprom.cvb_eeprom_read_size = 0. For bootloader/t186ref/BCT/tegra194-mb1-bct-misc-l4t.cfg, I set both

eprom.cvm_eeprom_read_size = 0;
eeprom.cvb_eeprom_read_size = 0;

boot hangs at:

[0000.167] W> RATCHET: MB1 binary ratchet value 4 is larger than ratchet level 1
 from HW fuses.
[0000.175] I> MB1 (prd-version: 2.2.0.0-t194-41334769-3540ffaa)
[0000.180] I> Boot-mode: Coldboot
[0000.183] I> Platform: Silicon
[0000.186] I> Chip revision : A02
[0000.189] I> Bootrom patch version : 7 (correctly patched)
[0000.194] I> ATE fuse revision : 0x200
[0000.198] I> Ram repair fuse : 0x0
[0000.201] I> Ram Code : 0x0
[0000.203] I> rst_source: 0x0, rst_level: 0x0
[0000.208] I> Boot-device: SDMMC (instance: 3)
[0000.224] I> sdmmc DDR50 mode
[0000.228] I> Boot chain mechanism: A/B
[0000.232] I> Current Boot-Chain Slot: 0
[0000.235] W> No valid slot number is found in scratch register
[0000.241] W> Return default slot: _a
[0000.246] W> PROD_CONFIG: device prod data is empty in MB1 BCT.
[0000.253] I> Temperature = 26000
[0000.256] W> Skipping boost for clk: BPMP_CPU_NIC
[0000.260] W> Skipping boost for clk: BPMP_APB
[0000.264] W> Skipping boost for clk: AXI_CBB
[0000.268] W> Skipping boost for clk: AON_CPU_NIC
[0000.272] W> Skipping boost for clk: CAN1
[0000.276] W> Skipping boost for clk: CAN2
[0000.280] I> Boot-device: SDMMC (instance: 3)
[0000.289] I> Sdmmc: HS400 mode enabled
[0000.294] I> Non-ECC region[0]: Start:0x80000000, End:0x100000000
[0000.300] W>  Thermal config not found in BCT
[0000.309] W>  MEMIO rail config not found in BCT
[0000.327] I> sdmmc bdev is already initialized
[0000.371] W>  Platform config not found in BCT
[0000.405] I> MB1 done

����main enter
SPE VERSION #: R01.00.18 Created: Jan 29 2021 @ 14:18:27
HW Function test
Start Scheduler.
in late init

[0000.414] I> Welcome to MB2(TBoot-BPMP) (version: default.t194-mobile-2fb96459)
[0000.415] I> DMA Heap @ [0x526fa000 - 0x52ffa000]
[0000.415] I> Default Heap @ [0xd486400 - 0xd48a400]
[0000.416] E> DEVICE_PROD: Invalid value data = 70020000, size = 0.
[0000.422] W> device prod register failed
[0000.425] I> Boot_device: SDMMC_BOOT instance: 3
[0000.430] I> sdmmc-3 params source = boot args
[0000.435] I> sdmmc-3 params source = boot args
[0000.438] I> sdmmc bdev is already initialized
[0000.447] I> Found 21 partitions in SDMMC_BOOT (instance 3)
[0000.453] I> Found 41 partitions in SDMMC_USER (instance 3)
[0000.454] W> No valid slot number is found in scratch register
[0000.459] W> Return default slot: _a
[0000.463] I> Active Boot chain : 0
[0000.490] I> Relocating BR-BCT
[0000.491]  > DEVICE_PROD: device prod is not initialized.
[0000.516] I> Skip reading CVB eeprom BoardID