Xavier NX PCIE Endpoint Mode

Robotics & Edge Computing Jetson & Embedded Systems Jetson Xavier NX
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1

Hello,
My Company requires our Xavier NX’s to be placed in endpoint mode in order to be used on our system. The goal is to eventually have this module show up as a ethernet device over PCIE.

For our initial testing, we are using the devkit version of the board.

Here are the steps that we followed so far:
Change “ODMDATA=0xB8191000” in p3668.conf.common.

Flash the board:
sudo ./flash.sh jetson-xavier-nx-devkit-emmc mmcblk0p1

From the Xavier AGX documentation, run these commands as root ( to set it up as an ethernet device over PCIE ):
cd /sys/kernel/config/pci_ep/
mkdir -p functions/pci_epf_tvnet/func1
echo 16 > functions/pci_epf_tvnet/func1/msi_interrupts
ln -s functions/pci_epf_tvnet/func1 controllers/141a0000.pcie_ep/
echo 1 > controllers/141a0000.pcie_ep/start

Unfortunately, in: /sys/kernel/config/pci_ep/controllers/, nothing shows up.

Are we missing something?

Also, once we get this working, the board will show up as an ethernet device or do we have to write custom drivers to do so?

SDK Manager version: 1.9.1.10844

Thanks!

4

Which jetpack release is in use? There is not much help to tell me the version of sdkmanager… sdkmanager can install lots of different kinds of jetpack release…

5

Thanks for getting back to me.

image

6

Jetpack 5.1

1 Like
7

I’m interested in Endpoint Mode as well. How do you place the NX into Endpoint mode (I saw above the AGX documentation but it also didn’t work for me). I’m using the latest JetPack 5.1 release.

Thanks in advance.

8

Hi @smcentee

You need to modify the ODMDATA in p3668.conf.common as the AGX document told.

9

@WayneWWW,

See our steps above. Is it only:

  • Changing “ODMDATA=0xB8191000” in p3668.conf.common.
  • Then running the commands above after flashing?

Are we supposed to see anything in the /sys/kernel/config/pci_ep/controllers/ directory after it is in endpoint mode?

Thanks!

10

BTW, what kind of carrier board you are using here?

11

WayneWWW, smcentee & I are working together, so my initial post applies to both of us. We have the XavierNX devkit boards.

12

I am not sure if we should proceed here.

For example, even if all software are ready, NX devkit has no interface for you to run endpoint mode… there is no method to validate this on devkit.

13

WayneWWW, just to clarify, if we have another PCIE device in root complex mode connected to the XavierNX devkit, there is no way to put the XavierNX devkit in endpoint mode to support this correct?

Do we need the production version of the XavierNX?

Thanks.

14

You won’t be able to do that on devkit as the hardware does not support it.

15

@WayneWWW We are not using the carrier board, but just the SoM.

If we change the ODMDATA=0xB8191000 in the p3668.conf.common file, it does not boot. We receive the attached error log:

XavierNX_Endpoint_Errors.txt (34.1 KB)

If that file is not changed (ODMDATA=0xB8190000 as the original), it boots correctly to the login prompt.

What else needs to be changed in order to put the XAVIER NX in Endpoint Mode?

I tried the same test using a production XAVIER NX (but flashing with the devkit-emmc parameter line) and received the same error.

Should I be using a different CLI command for the production NX?

Thanks!

16

@WayneWWW , We were able to get our hands on the production module, placed it on our custom carrier board and unfortunately the same errors in the above log still occur, could you send the above .txt log to your developers and see if they know what those errors mean?

17

@WayneWWW I found this link on the forums where they have the same errors as us, but it’s the AGX board:
PCIe EP mode for AGX Xavier Industrial - Jetson & Embedded Systems / Jetson AGX Xavier - NVIDIA Developer Forums

You recommended a patch to their dts file to make it work.

In our file named: /source/hardware/nvidia/platform/t19x/jakku/kernel-dts/tegra194-p3668-p3509-overlay.dts ,the last 2 sections look like this:

   /* pcie-c5-rp */
    fragment@6 {
            target-path = "/";
            board_config {
                    odm-data = "disable-pcie-c5-endpoint", "enable-nvhs-uphy-pcie-c5";
            };
            __overlay__ {
                    pcie@141a0000 {
                            status = "okay";
                    };
                    pcie_ep@141a0000 {
                            status = "disabled";
                    };

#if TEGRA_PCIE_VERSION < DT_VERSION_2
gpio@c2f0000 {
pex-refclk-sel-low {
status = “okay”;
};
};
#endif
};
};

   /* pcie-c5-ep */
    fragment@7 {
            target-path = "/";
            board_config {                      
                    odm-data = "enable-pcie-c5-endpoint", "enable-nvhs-uphy-pcie-c5";
            };
            __overlay__ {
                    pcie@141a0000 {
                            status = "disabled";
                    };
                    pcie_ep@141a0000 {
                            status = "okay";
                    };

#if TEGRA_PCIE_VERSION < DT_VERSION_2
gpio@c2f0000 {
pex-refclk-sel-high {
status = “okay”;
};
};
#endif
};
};

Do we have to change anything in this file?

18

Does that patch exist in your bsp or not?

19

@WayneWWW,

In my above post, our fragment@7 looks almost identical to that patch although our odm-data = “enable-pcie-c5-endpoint”, “enable-nvhs-uphy-pcie-c5”;, while your patch’s odm-data=“pcie-c5-endpoint-enable”.

Not sure if that matters.
The .dts file that we are using is the default.

Should we apply that patch in addition to our fragment@7 ( even though it’s almost identical )?

Is it necessary to rebuild the kernel after changing that .dts file?

20

Which jetpack version is in use here? JP5.1?

21

@WayneWWW,
Yes, Jetpack 5.1.

22

please try my patch to overwrite the existing one. I feel there is a bug as the existing one in BSP is not correct.